rmg-001/src/bus.rs

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4.4 KiB
Rust
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use crate::utils::{join_bytes};
use crate::rom::ROM;
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pub struct AddressRange {
begin: u16,
end: u16,
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}
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impl AddressRange {
pub fn begin(&self) -> u16 {
self.begin
}
pub fn end(&self) -> u16 {
self.end
}
pub fn in_range(&self, address: u16) -> bool {
address >= self.begin && address <= self.end
}
}
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pub const BANK_ZERO: AddressRange = AddressRange{begin: 0x0000, end: 0x3FFF};
pub const BANK_SWITCHABLE: AddressRange = AddressRange{begin: 0x4000, end: 0x7FFF};
pub const VIDEO_RAM: AddressRange = AddressRange{begin: 0x8000, end: 0x9FFF};
pub const EXTERNAL_RAM: AddressRange = AddressRange{begin: 0xA000, end: 0xBFFF};
pub const WORK_RAM_1: AddressRange = AddressRange{begin: 0xC000, end: 0xCFFF};
pub const WORK_RAM_2: AddressRange = AddressRange{begin: 0xD000, end: 0xDFFF};
pub const ECHO_RAM: AddressRange = AddressRange{begin: 0xE000, end: 0xFDFF};
pub const SPRITE_ATTRIBUTE_TABLE: AddressRange = AddressRange{begin: 0xFE00, end: 0xFE9F};
pub const NOT_USABLE: AddressRange = AddressRange{begin: 0xFEA0, end: 0xFEFF};
pub const IO_REGISTERS: AddressRange = AddressRange{begin: 0xFF00, end: 0xFF7F};
pub const HIGH_RAM: AddressRange = AddressRange{begin: 0xFF80, end: 0xFFFE};
pub const INTERRUPT_ENABLE_REGISTER: AddressRange = AddressRange{begin: 0xFFFF, end: 0xFFFF};
pub struct Bus {
game_rom: ROM,
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data: [u8; 0x10000],
}
impl Bus {
pub fn new() -> Self {
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let game_rom = match ROM::load_file("ignore/tetris.gb".to_string()) {
// let game_rom = match ROM::load_file("roms/cpu_instrs.gb".to_string()) {
// let game_rom = match ROM::load_file("roms/cpu_instrs_individual/01-special.gb".to_string()) {
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// let game_rom = match ROM::load_file("roms/cpu_instrs_individual/03-op sp,hl.gb".to_string()) {
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// let game_rom = match ROM::load_file("roms/cpu_instrs_individual/04-op r,imm.gb".to_string()) {
// let game_rom = match ROM::load_file("roms/cpu_instrs_individual/05-op rp.gb".to_string()) {
// let game_rom = match ROM::load_file("roms/cpu_instrs_individual/06-ld r,r.gb".to_string()) {
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// let game_rom = match ROM::load_file("roms/cpu_instrs_individual/07-jr,jp,call,ret,rst.gb".to_string()) {
// let game_rom = match ROM::load_file("roms/cpu_instrs_individual/08-misc instrs.gb".to_string()) {
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// let game_rom = match ROM::load_file("roms/cpu_instrs_individual/09-op r,r.gb".to_string()) {
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// let game_rom = match ROM::load_file("roms/cpu_instrs_individual/10-bit ops.gb".to_string()) {
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// let game_rom = match ROM::load_file("roms/cpu_instrs_individual/11-op a,(hl).gb".to_string()) {
Ok(rom) => rom,
// _ => ROM::from_bytes(&[0; 0xFFFF])
_ => panic!("Could not read ROM"),
};
Self {
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data: [0x00; 0x10000],
game_rom,
}
}
pub fn read(&self, address: u16) -> u8 {
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if BANK_ZERO.in_range(address) || BANK_SWITCHABLE.in_range(address) {
return self.game_rom.read(address);
} else if IO_REGISTERS.in_range(address) {
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return self.data[address as usize];
}
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self.data[address as usize]
}
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pub fn read_16bit(&self, address: u16) -> u16 {
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join_bytes(self.read(address.wrapping_add(1)), self.read(address))
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}
pub fn write(&mut self, address: u16, data: u8) {
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if address == 0xFF01 {
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print!("{}", data as char);
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}
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if BANK_ZERO.in_range(address) || BANK_SWITCHABLE.in_range(address) {
println!("WRITING TO ROM");
} else if WORK_RAM_1.in_range(address) || WORK_RAM_2.in_range(address) {
self.data[address as usize] = data;
// Copy to the ECHO RAM
if address <= 0xDDFF {
self.data[(ECHO_RAM.begin() + (address - WORK_RAM_1.begin())) as usize] = data;
}
} else if ECHO_RAM.in_range(address) {
self.data[address as usize] = data;
self.data[(WORK_RAM_1.begin() + (address - ECHO_RAM.begin())) as usize] = data; // Copy to the working RAM
}
self.data[address as usize] = data;
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}
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pub fn write_16bit(&mut self, address: u16, data: u16) {
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let bytes = data.to_le_bytes();
self.write(address, bytes[0]);
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self.write(address.wrapping_add(1), bytes[1]);
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}
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}