diff --git a/src/render.rs b/src/render.rs
index aabe980..f93dd64 100644
--- a/src/render.rs
+++ b/src/render.rs
@@ -3,8 +3,6 @@ use crate::frames::Frames;
 use crate::cpu::{Cycles};
 use crate::ppu::{WIDTH, HEIGHT};
 
-use std::{thread, time};
-
 use log::error;
 use pixels::{wgpu, Pixels, PixelsBuilder, SurfaceTexture};
 use winit::dpi::LogicalSize;
diff --git a/src/rom.rs b/src/rom.rs
index 7740a23..d4b15ac 100644
--- a/src/rom.rs
+++ b/src/rom.rs
@@ -26,14 +26,12 @@ enum MBC {
     MBC1,
     MBC2,
     MBC3,
-    MBC4,
     MBC5,
     MBC6,
     MBC7,
     HuC1,
     HuC3,
     MMM01,
-    MBC1M,
     PocketCamera,
     BandaiTIMA5,
 }
@@ -207,14 +205,13 @@ impl ROM {
             },
             _ => unimplemented!(),
         }
-        self.data[address as usize]
     }
 
     pub fn write(&mut self, address: u16, data: u8) {
         match self.info.mbc {
             MBC::NoMBC => {},
             MBC::MBC1 => {
-                if address >= 0x0000 && address <= 0x1FFF { // RAM enable register
+                if address <= 0x1FFF { // RAM enable register
                     if !self.info.has_ram {
                         return;
                     }
diff --git a/src/timer.rs b/src/timer.rs
index 854259d..0e8fb58 100644
--- a/src/timer.rs
+++ b/src/timer.rs
@@ -50,7 +50,7 @@ impl Timer {
     fn cycle(&mut self, bus: &mut Bus) {
         self.divider = self.divider.wrapping_add(1);
 
-        let result = self.is_enabled && self.get_tima_rate(bus);
+        let result = self.is_enabled && self.get_tima_rate();
 
         if self.prev_result && !result {
             let tima = bus.read(TIMER_COUNTER_ADDRESS).wrapping_add(1);
@@ -69,7 +69,7 @@ impl Timer {
         get_bit(bus.read(TIMER_CONTROL_ADDRESS), BitIndex::I2)
     }
 
-    fn get_tima_rate(&self, bus: &Bus) -> bool {
+    fn get_tima_rate(&self) -> bool {
         let clock_select = self.control & 0b0000_0011;
         match clock_select {
             0b00 => ((self.divider >> 9) & 1) == 1,