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Fix PUSH instruction
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parent
989971af8b
commit
12b43ee985
16
src/cpu.rs
16
src/cpu.rs
@ -446,17 +446,19 @@ impl CPU {
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Opcode::RST(address) => self.exec(Opcode::CALL(OpcodeParameter::U16(address as u16)), bus),
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// PUSH onto the stack
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Opcode::PUSH(register) => {
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let val = self.registers.get(register).to_be_bytes();
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let sp = self.registers.get(Register::SP);
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bus.write(sp - 1, val[1]);
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bus.write(sp - 2, val[0]);
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self.registers.increment(Register::PC, 1);
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self.registers.decrement(Register::SP, 2);
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let val = self.registers.get(register).to_be_bytes();
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self.registers.decrement(Register::SP, 1);
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bus.write(self.registers.get(Register::SP), val[0]);
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self.registers.decrement(Register::SP, 1);
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bus.write(self.registers.get(Register::SP), val[1]);
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},
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// POP onto the stack
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Opcode::POP(register) => {
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self.registers.increment(Register::PC, 1);
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let sp = self.registers.get(Register::SP);
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self.registers.set(register, bus.read_16bit(sp));
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let val = bus.read_16bit(sp);
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self.registers.set(register, val);
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self.registers.increment(Register::SP, 2);
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},
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// RET, same as POP PC when no parameter is specified
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@ -1012,7 +1014,7 @@ mod tests {
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cpu.registers.set(Register::SP, addr);
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cpu.registers.set(Register::AF, 0x1234);
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cpu.exec(Opcode::PUSH(Register::AF), &mut bus);
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assert_eq!(bus.read_16bit(addr - 2), 0x3412);
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assert_eq!(bus.read_16bit(addr - 2), 0x1234);
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assert_eq!(cpu.registers.get(Register::SP), addr - 2);
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assert_eq!(cpu.registers.get(Register::PC), 0x101);
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