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fix ram banking mbc1

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Franco Colmenarez 2021-11-19 12:46:14 -05:00
parent 841cc96a67
commit 186d6fa23b
1 changed files with 5 additions and 6 deletions
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11
src/rom.rs
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@ -257,7 +257,7 @@ impl MBC1 {
println!("ROM banks {}", info.rom_banks); println!("ROM banks {}", info.rom_banks);
println!("RAM banks {}", info.ram_banks); println!("RAM banks {}", info.ram_banks);
let ram = vec![0; info.ram_size() as usize]; let ram = vec![0; info.ram_size() as usize];
let is_large_rom = info.rom_size() >= 1048576; let is_large_rom = info.rom_banks > 32;
Self { Self {
data, data,
info, info,
@ -278,12 +278,13 @@ impl MBC1 {
if self.rom_bank > self.info.rom_banks.saturating_sub(1) { if self.rom_bank > self.info.rom_banks.saturating_sub(1) {
self.rom_bank = self.info.rom_banks.saturating_sub(1); self.rom_bank = self.info.rom_banks.saturating_sub(1);
} }
//println!("switched to ROM bank {}", self.rom_bank);
} }
fn switch_ram_bank(&mut self, bank: u8) { fn switch_ram_bank(&mut self, bank: u8) {
self.ram_bank = bank & 0b11; self.ram_bank = bank & 0b11;
// println!("switched to RAM bank {}", self.ram_bank); if self.ram_bank > self.info.ram_banks.saturating_sub(1) {
self.ram_bank = self.info.ram_banks.saturating_sub(1);
}
} }
fn get_bank_zero_address(&self, address: u16) -> usize { fn get_bank_zero_address(&self, address: u16) -> usize {
@ -292,9 +293,7 @@ impl MBC1 {
} }
match self.banking_mode { match self.banking_mode {
BankingMode::Simple => address as usize, BankingMode::Simple => address as usize,
BankingMode::Advanced => { BankingMode::Advanced => ((self.ram_bank as usize) << 5) * ((address & 0x3FFF) as usize),
((self.ram_bank as usize) << 5) * ((address & 0x3FFF) as usize)
},
} }
} }