diff --git a/src/bus.rs b/src/bus.rs index 98bc25a..5f72765 100644 --- a/src/bus.rs +++ b/src/bus.rs @@ -91,11 +91,11 @@ impl Bus { pub fn write(&mut self, address: u16, data: u8) { if address == 0xFF01 { - print!("{}", data as char); + // print!("{}", data as char); } if BANK_ZERO.in_range(address) || BANK_SWITCHABLE.in_range(address) { - println!("WRITING TO ROM"); + // println!("WRITING TO ROM"); } else if WORK_RAM_1.in_range(address) || WORK_RAM_2.in_range(address) { self.data[address as usize] = data; // Copy to the ECHO RAM diff --git a/src/cpu.rs b/src/cpu.rs index ebc5397..f82568e 100644 --- a/src/cpu.rs +++ b/src/cpu.rs @@ -873,39 +873,37 @@ impl CPU { bus.set_interrupt(interrupt, false); let vector = Bus::get_interrupt_vector(interrupt); self.exec(Opcode::CALL(OpcodeParameter::U16(vector)), bus); - self.decrement_cycles(Cycles(1)); + self.increment_cycles(Cycles(5)); + println!("Interrupt: {:?}", interrupt); } - pub fn check_interrupt(&mut self, bus: &mut Bus) -> bool { + pub fn check_interrupts(&mut self, bus: &mut Bus) -> Option { if bus.get_interrupt(Interrupt::VBlank) { - self.handle_interrupt(bus, Interrupt::VBlank); - return true; + return Some(Interrupt::VBlank); } else if bus.get_interrupt(Interrupt::LCDSTAT) { - self.handle_interrupt(bus, Interrupt::LCDSTAT); - return true; + return Some(Interrupt::LCDSTAT); } else if bus.get_interrupt(Interrupt::Timer) { - self.handle_interrupt(bus, Interrupt::Timer); - return true; + return Some(Interrupt::Timer); } else if bus.get_interrupt(Interrupt::Serial) { - self.handle_interrupt(bus, Interrupt::Serial); - return true; + return Some(Interrupt::Serial); } else if bus.get_interrupt(Interrupt::Joypad) { - self.handle_interrupt(bus, Interrupt::Joypad); - return true; + return Some(Interrupt::Joypad); } - return false; + None } pub fn run(&mut self, bus: &mut Bus) { let cycles_start = self.get_cycles(); - let program_counter = self.registers.get(Register::PC); - let parameter_bytes = OpcodeParameterBytes::from_address(program_counter, bus); - let (opcode, cycles) = parameter_bytes.parse_opcode(); - if !env::var("CPU_LOG").is_err() { - self.log(parameter_bytes); - } - self.increment_cycles(cycles); - if !self.check_interrupt(bus) { + if let Some(interrupt) = self.check_interrupts(bus) { + self.handle_interrupt(bus, interrupt); + } else { + let program_counter = self.registers.get(Register::PC); + let parameter_bytes = OpcodeParameterBytes::from_address(program_counter, bus); + let (opcode, cycles) = parameter_bytes.parse_opcode(); + if !env::var("CPU_LOG").is_err() { + self.log(parameter_bytes); + } + self.increment_cycles(cycles); self.exec(opcode, bus); } let cycles_end = self.get_cycles(); diff --git a/src/ppu.rs b/src/ppu.rs index 3ab0f8f..6567395 100644 --- a/src/ppu.rs +++ b/src/ppu.rs @@ -98,8 +98,10 @@ impl PPU { pub fn cycle(&mut self, bus: &mut Bus) { // Mode 1 Vertical blank if PPU::get_lcd_y(bus) >= 144 { - bus.set_interrupt(Interrupt::VBlank, true); - PPU::set_lcd_status(bus, LCDStatus::ModeFlag(LCDStatusModeFlag::VBlank), true); + if PPU::get_lcd_y(bus) == 144 { + bus.set_interrupt(Interrupt::VBlank, true); + PPU::set_lcd_status(bus, LCDStatus::ModeFlag(LCDStatusModeFlag::VBlank), true); + } } else { if self.cycles.0 == 0 { // Mode 2 OAM scan