diff --git a/src/bus.rs b/src/bus.rs index 71e79d2..38bc642 100644 --- a/src/bus.rs +++ b/src/bus.rs @@ -43,7 +43,7 @@ pub struct Bus { impl Bus { pub fn new() -> Self { - // let game_rom = match ROM::load_file("roms/cpu_instrs_individual/01-special.gb".to_string()) { + let game_rom = match ROM::load_file("roms/cpu_instrs_individual/01-special.gb".to_string()) { // let game_rom = match ROM::load_file("roms/cpu_instrs_individual/03-op sp,hl.gb".to_string()) { // let game_rom = match ROM::load_file("roms/cpu_instrs_individual/04-op r,imm.gb".to_string()) { // let game_rom = match ROM::load_file("roms/cpu_instrs_individual/05-op rp.gb".to_string()) { @@ -52,7 +52,7 @@ impl Bus { // let game_rom = match ROM::load_file("roms/cpu_instrs_individual/08-misc instrs.gb".to_string()) { // let game_rom = match ROM::load_file("roms/cpu_instrs_individual/09-op r,r.gb".to_string()) { // let game_rom = match ROM::load_file("roms/cpu_instrs_individual/10-bit ops.gb".to_string()) { - let game_rom = match ROM::load_file("roms/cpu_instrs_individual/11-op a,(hl).gb".to_string()) { + // let game_rom = match ROM::load_file("roms/cpu_instrs_individual/11-op a,(hl).gb".to_string()) { Ok(rom) => rom, _ => ROM::from_bytes(&[0; 0xFFFF]) }; diff --git a/src/cpu.rs b/src/cpu.rs index b767738..cd43608 100644 --- a/src/cpu.rs +++ b/src/cpu.rs @@ -871,7 +871,7 @@ impl CPU { let program_counter = self.registers.get(Register::PC); let parameter_bytes = OpcodeParameterBytes::from_address(program_counter, bus); let (opcode, cycles) = parameter_bytes.parse_opcode(); - self.log(parameter_bytes); + // self.log(parameter_bytes); self.increment_cycles(cycles); self.exec(opcode, bus); self.increment_exec_calls_count(); @@ -1008,78 +1008,75 @@ impl CPU { }, _ => {}, }, - Opcode::AND(params) => match params { - OpcodeParameter::Register_Register(reg1, reg2) => { - self.registers.increment(Register::PC, 1); - if reg2.is_8bit() { - self.registers.set(reg1, self.registers.get(reg1) & self.registers.get(reg2)); - } else { - let val = bus.read(self.registers.get(reg2)) as u16; - self.registers.set(reg1, self.registers.get(reg1) & val); - } - self.registers.set_flag(FlagRegister::Zero, self.registers.get(reg1) == 0); - self.registers.set_flag(FlagRegister::Substract, false); - self.registers.set_flag(FlagRegister::HalfCarry, true); - self.registers.set_flag(FlagRegister::Carry, false); - }, - OpcodeParameter::Register_U8(reg, val) => { - self.registers.increment(Register::PC, 2); - self.registers.set(reg, self.registers.get(reg) & (val as u16)); - self.registers.set_flag(FlagRegister::Zero, self.registers.get(reg) == 0); - self.registers.set_flag(FlagRegister::Substract, false); - self.registers.set_flag(FlagRegister::HalfCarry, true); - self.registers.set_flag(FlagRegister::Carry, false); - }, - _ => {}, + Opcode::AND(params) => { + match params { + OpcodeParameter::Register_Register(reg1, reg2) => { + self.registers.increment(Register::PC, 1); + if reg2.is_8bit() { + self.registers.set(reg1, self.registers.get(reg1) & self.registers.get(reg2)); + } else { + let val = bus.read(self.registers.get(reg2)) as u16; + self.registers.set(reg1, self.registers.get(reg1) & val); + } + self.registers.set_flag(FlagRegister::Zero, self.registers.get(reg1) == 0); + }, + OpcodeParameter::Register_U8(reg, val) => { + self.registers.increment(Register::PC, 2); + self.registers.set(reg, self.registers.get(reg) & (val as u16)); + self.registers.set_flag(FlagRegister::Zero, self.registers.get(reg) == 0); + }, + _ => {}, + }; + self.registers.set_flag(FlagRegister::Substract, false); + self.registers.set_flag(FlagRegister::HalfCarry, true); + self.registers.set_flag(FlagRegister::Carry, false); }, - Opcode::OR(params) => match params { - OpcodeParameter::Register_Register(reg1, reg2) => { - self.registers.increment(Register::PC, 1); - if reg2.is_8bit() { - self.registers.set(reg1, self.registers.get(reg1) | self.registers.get(reg2)); - } else { - let val = bus.read(self.registers.get(reg2)) as u16; - self.registers.set(reg1, self.registers.get(reg1) | val); - } - self.registers.set_flag(FlagRegister::Zero, self.registers.get(reg1) == 0); - self.registers.set_flag(FlagRegister::Substract, false); - self.registers.set_flag(FlagRegister::HalfCarry, false); - self.registers.set_flag(FlagRegister::Carry, false); - }, - OpcodeParameter::Register_U8(reg, val) => { - self.registers.increment(Register::PC, 2); - self.registers.set(reg, self.registers.get(reg) | (val as u16)); - self.registers.set_flag(FlagRegister::Zero, self.registers.get(reg) == 0); - self.registers.set_flag(FlagRegister::Substract, false); - self.registers.set_flag(FlagRegister::HalfCarry, false); - self.registers.set_flag(FlagRegister::Carry, false); - }, - _ => {}, + Opcode::OR(params) => { + match params { + OpcodeParameter::Register_Register(reg1, reg2) => { + self.registers.increment(Register::PC, 1); + if reg2.is_8bit() { + self.registers.set(reg1, self.registers.get(reg1) | self.registers.get(reg2)); + } else { + let val = bus.read(self.registers.get(reg2)) as u16; + self.registers.set(reg1, self.registers.get(reg1) | val); + } + self.registers.set_flag(FlagRegister::Zero, self.registers.get(reg1) == 0); + }, + OpcodeParameter::Register_U8(reg, val) => { + self.registers.increment(Register::PC, 2); + self.registers.set(reg, self.registers.get(reg) | (val as u16)); + self.registers.set_flag(FlagRegister::Zero, self.registers.get(reg) == 0); + }, + _ => {}, + }; + self.registers.set_flag(FlagRegister::Substract, false); + self.registers.set_flag(FlagRegister::HalfCarry, false); + self.registers.set_flag(FlagRegister::Carry, false); + }, + Opcode::XOR(params) => { + match params { + OpcodeParameter::Register_Register(reg1, reg2) => { + self.registers.increment(Register::PC, 1); + if reg2.is_8bit() { + self.registers.set(reg1, self.registers.get(reg1) ^ self.registers.get(reg2)); + } else { + let val = bus.read(self.registers.get(reg2)) as u16; + self.registers.set(reg1, self.registers.get(reg1) ^ val); + } + self.registers.set_flag(FlagRegister::Zero, self.registers.get(reg1) == 0); + }, + OpcodeParameter::Register_U8(reg, val) => { + self.registers.increment(Register::PC, 2); + self.registers.set(reg, self.registers.get(reg) ^ (val as u16)); + self.registers.set_flag(FlagRegister::Zero, self.registers.get(reg) == 0); + }, + _ => {}, + }; + self.registers.set_flag(FlagRegister::Substract, false); + self.registers.set_flag(FlagRegister::HalfCarry, false); + self.registers.set_flag(FlagRegister::Carry, false); }, - Opcode::XOR(params) => match params { - OpcodeParameter::Register_Register(reg1, reg2) => { - self.registers.increment(Register::PC, 1); - if reg2.is_8bit() { - self.registers.set(reg1, self.registers.get(reg1) ^ self.registers.get(reg2)); - } else { - let val = bus.read(self.registers.get(reg2)) as u16; - self.registers.set(reg1, self.registers.get(reg1) ^ val); - } - self.registers.set_flag(FlagRegister::Zero, self.registers.get(reg1) == 0); - self.registers.set_flag(FlagRegister::Substract, false); - self.registers.set_flag(FlagRegister::HalfCarry, false); - self.registers.set_flag(FlagRegister::Carry, false); - }, - OpcodeParameter::Register_U8(reg, val) => { - self.registers.increment(Register::PC, 2); - self.registers.set(reg, self.registers.get(reg) ^ (val as u16)); - self.registers.set_flag(FlagRegister::Zero, self.registers.get(reg) == 0); - self.registers.set_flag(FlagRegister::Substract, false); - self.registers.set_flag(FlagRegister::HalfCarry, false); - self.registers.set_flag(FlagRegister::Carry, false); - }, - _ => {}, - } // Substract without storing the value Opcode::CP(params) => { let mut val1: i16 = 0; @@ -1339,7 +1336,6 @@ impl CPU { Opcode::DAA => { self.registers.increment(Register::PC, 1); let mut val = self.registers.get_8bit(Register::A); - if !self.registers.get_flag(FlagRegister::Substract) { if self.registers.get_flag(FlagRegister::Carry) || val > 0x99 { val = val.wrapping_add(0x60);