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https://github.com/FranLMSP/rmg-001.git
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Implement push and refactor pop
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parent
4dbcb4cb6c
commit
989971af8b
51
src/cpu.rs
51
src/cpu.rs
@ -437,21 +437,27 @@ impl CPU {
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let pc = self.registers.get(Register::PC);
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let pc = self.registers.get(Register::PC);
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self.registers.decrement(Register::SP, 2);
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self.registers.decrement(Register::SP, 2);
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let sp = self.registers.get(Register::SP);
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let sp = self.registers.get(Register::SP);
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bus.write_16bit(sp, pc);
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bus.write_16bit(sp, pc + 3);
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self.registers.set(Register::PC, address);
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self.registers.set(Register::PC, address);
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},
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},
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_ => {},
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_ => {},
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},
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},
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// RST, same as Call
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// RST, same as Call
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Opcode::RST(address) => self.exec(Opcode::CALL(OpcodeParameter::U16(address as u16)), bus),
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Opcode::RST(address) => self.exec(Opcode::CALL(OpcodeParameter::U16(address as u16)), bus),
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// POP
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// PUSH onto the stack
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Opcode::POP(register) => {
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Opcode::PUSH(register) => {
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if register.is_16bit() {
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let val = self.registers.get(register).to_be_bytes();
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let sp = self.registers.get(Register::SP);
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let sp = self.registers.get(Register::SP);
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let val = bus.read_16bit(sp);
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bus.write(sp - 1, val[1]);
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self.registers.set(register, val);
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bus.write(sp - 2, val[0]);
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self.registers.increment(Register::PC, 1);
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self.registers.decrement(Register::SP, 2);
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},
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// POP onto the stack
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Opcode::POP(register) => {
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let sp = self.registers.get(Register::SP);
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self.registers.set(register, bus.read_16bit(sp));
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self.registers.increment(Register::SP, 2);
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self.registers.increment(Register::SP, 2);
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}
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},
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},
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// RET, same as POP PC when no parameter is specified
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// RET, same as POP PC when no parameter is specified
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Opcode::RET(params) => match params {
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Opcode::RET(params) => match params {
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@ -985,7 +991,7 @@ mod tests {
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cpu.registers.set(Register::SP, sp);
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cpu.registers.set(Register::SP, sp);
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cpu.registers.set(Register::PC, 0x1234);
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cpu.registers.set(Register::PC, 0x1234);
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cpu.exec(Opcode::CALL(OpcodeParameter::U16(0xF0F0)), &mut bus);
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cpu.exec(Opcode::CALL(OpcodeParameter::U16(0xF0F0)), &mut bus);
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assert_eq!(bus.read_16bit(sp - 2), 0x1234);
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assert_eq!(bus.read_16bit(sp - 2), 0x1234 + 3);
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assert_eq!(cpu.registers.get(Register::SP), sp - 2);
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assert_eq!(cpu.registers.get(Register::SP), sp - 2);
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assert_eq!(cpu.registers.get(Register::PC), 0xF0F0);
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assert_eq!(cpu.registers.get(Register::PC), 0xF0F0);
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@ -995,22 +1001,35 @@ mod tests {
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cpu.registers.set(Register::SP, sp);
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cpu.registers.set(Register::SP, sp);
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cpu.registers.set(Register::PC, 0x1234);
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cpu.registers.set(Register::PC, 0x1234);
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cpu.exec(Opcode::RST(0xF0), &mut bus);
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cpu.exec(Opcode::RST(0xF0), &mut bus);
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assert_eq!(bus.read_16bit(sp - 2), 0x1234);
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assert_eq!(bus.read_16bit(sp - 2), 0x1234 + 3);
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assert_eq!(cpu.registers.get(Register::SP), sp - 2);
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assert_eq!(cpu.registers.get(Register::SP), sp - 2);
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assert_eq!(cpu.registers.get(Register::PC), 0x00F0);
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assert_eq!(cpu.registers.get(Register::PC), 0x00F0);
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// PUSH
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let mut cpu = CPU::new();
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let mut bus = Bus::new();
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let addr = 0xD000;
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cpu.registers.set(Register::SP, addr);
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cpu.registers.set(Register::AF, 0x1234);
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cpu.exec(Opcode::PUSH(Register::AF), &mut bus);
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assert_eq!(bus.read_16bit(addr - 2), 0x3412);
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assert_eq!(cpu.registers.get(Register::SP), addr - 2);
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assert_eq!(cpu.registers.get(Register::PC), 0x101);
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// POP
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// POP
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let mut cpu = CPU::new();
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let mut cpu = CPU::new();
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let sp = 0xFFDF;
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let mut bus = Bus::new();
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cpu.registers.set(Register::SP, sp);
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let addr = 0xD000;
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bus.write_16bit(sp, 0x1234);
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cpu.registers.set(Register::SP, addr);
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cpu.exec(Opcode::POP(Register::HL), &mut bus);
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bus.write_16bit(addr, 0x1234);
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assert_eq!(cpu.registers.get(Register::HL), 0x1234);
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cpu.exec(Opcode::POP(Register::PC), &mut bus);
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assert_eq!(cpu.registers.get(Register::SP), sp + 2);
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assert_eq!(cpu.registers.get(Register::PC), 0x1234);
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assert_eq!(cpu.registers.get(Register::SP), addr + 2);
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// RET
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// RET
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let mut cpu = CPU::new();
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let mut cpu = CPU::new();
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let sp = 0xFFDF;
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let mut bus = Bus::new();
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let sp = 0xD000;
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cpu.registers.set(Register::SP, sp);
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cpu.registers.set(Register::SP, sp);
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bus.write_16bit(sp, 0x1234);
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bus.write_16bit(sp, 0x1234);
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cpu.exec(Opcode::RET(OpcodeParameter::NoParam), &mut bus);
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cpu.exec(Opcode::RET(OpcodeParameter::NoParam), &mut bus);
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