From abbd46ebed09e30244a0b514f3195ce6f805c790 Mon Sep 17 00:00:00 2001 From: Franco Colmenarez Date: Fri, 29 Oct 2021 18:27:21 -0500 Subject: [PATCH] Refactor interrupt enum --- src/bus.rs | 44 +++++++------------------------------------- src/cpu.rs | 32 +++++++++++++++++++++++++++++++- src/emulator.rs | 2 -- src/timer.rs | 11 +++++++++++ 4 files changed, 49 insertions(+), 40 deletions(-) create mode 100644 src/timer.rs diff --git a/src/bus.rs b/src/bus.rs index 5f72765..3923de9 100644 --- a/src/bus.rs +++ b/src/bus.rs @@ -106,9 +106,7 @@ impl Bus { self.data[address as usize] = data; self.data[(WORK_RAM_1.begin() + (address - ECHO_RAM.begin())) as usize] = data; // Copy to the working RAM } else if VIDEO_RAM.in_range(address) { - // if !PPU::get_lcd_status(self, LCDStatus::ModeFlag(LCDStatusModeFlag::TransferringToLCD)) { - self.data[address as usize] = data; - // } + self.data[address as usize] = data; } else { self.data[address as usize] = data; } @@ -120,46 +118,18 @@ impl Bus { self.write(address.wrapping_add(1), bytes[1]); } - pub fn set_interrupt_master(&mut self, flag: Interrupt, val: bool) { + pub fn set_interrupt_master(&mut self, interrupt: Interrupt, val: bool) { let byte = self.read(INTERRUPT_ENABLE_ADDRESS); - self.write(INTERRUPT_ENABLE_ADDRESS, match flag { - Interrupt::VBlank => set_bit(byte, val, BitIndex::I0), - Interrupt::LCDSTAT => set_bit(byte, val, BitIndex::I1), - Interrupt::Timer => set_bit(byte, val, BitIndex::I2), - Interrupt::Serial => set_bit(byte, val, BitIndex::I3), - Interrupt::Joypad => set_bit(byte, val, BitIndex::I4), - }); + self.write(INTERRUPT_ENABLE_ADDRESS, interrupt.set(byte, val)); } - pub fn set_interrupt(&mut self, flag: Interrupt, val: bool) { + pub fn set_interrupt(&mut self, interrupt: Interrupt, val: bool) { let byte = self.read(INTERRUPT_FLAG_ADDRESS); - self.write(INTERRUPT_FLAG_ADDRESS, match flag { - Interrupt::VBlank => set_bit(byte, val, BitIndex::I0), - Interrupt::LCDSTAT => set_bit(byte, val, BitIndex::I1), - Interrupt::Timer => set_bit(byte, val, BitIndex::I2), - Interrupt::Serial => set_bit(byte, val, BitIndex::I3), - Interrupt::Joypad => set_bit(byte, val, BitIndex::I4), - }); + self.write(INTERRUPT_FLAG_ADDRESS, interrupt.set(byte, val)); } - pub fn get_interrupt(&mut self, flag: Interrupt) -> bool { + pub fn get_interrupt(&mut self, interrupt: Interrupt) -> bool { let byte = self.read(INTERRUPT_ENABLE_ADDRESS) & self.read(INTERRUPT_FLAG_ADDRESS); - match flag { - Interrupt::VBlank => get_bit(byte, BitIndex::I0), - Interrupt::LCDSTAT => get_bit(byte, BitIndex::I1), - Interrupt::Timer => get_bit(byte, BitIndex::I2), - Interrupt::Serial => get_bit(byte, BitIndex::I3), - Interrupt::Joypad => get_bit(byte, BitIndex::I4), - } - } - - pub fn get_interrupt_vector(flag: Interrupt) -> u16 { - match flag { - Interrupt::VBlank => 0x40, - Interrupt::LCDSTAT => 0x48, - Interrupt::Timer => 0x50, - Interrupt::Serial => 0x58, - Interrupt::Joypad => 0x60, - } + interrupt.get(byte) } } diff --git a/src/cpu.rs b/src/cpu.rs index f82568e..c0ff92a 100644 --- a/src/cpu.rs +++ b/src/cpu.rs @@ -62,6 +62,36 @@ pub enum Interrupt { Joypad, } +impl Interrupt { + fn get_bit_index(&self) -> BitIndex { + match self { + Interrupt::VBlank => BitIndex::I0, + Interrupt::LCDSTAT => BitIndex::I1, + Interrupt::Timer => BitIndex::I2, + Interrupt::Serial => BitIndex::I3, + Interrupt::Joypad => BitIndex::I4, + } + } + + pub fn get(&self, byte: u8) -> bool { + get_bit(byte, self.get_bit_index()) + } + + pub fn set(&self, byte: u8, val: bool) -> u8 { + set_bit(byte, val, self.get_bit_index()) + } + + pub fn get_vector(&self) -> u16 { + match self { + Interrupt::VBlank => 0x40, + Interrupt::LCDSTAT => 0x48, + Interrupt::Timer => 0x50, + Interrupt::Serial => 0x58, + Interrupt::Joypad => 0x60, + } + } +} + pub struct Registers { a: u8, f: u8, @@ -871,7 +901,7 @@ impl CPU { pub fn handle_interrupt(&mut self, bus: &mut Bus, interrupt: Interrupt) { bus.set_interrupt_master(interrupt, false); bus.set_interrupt(interrupt, false); - let vector = Bus::get_interrupt_vector(interrupt); + let vector = interrupt.get_vector(); self.exec(Opcode::CALL(OpcodeParameter::U16(vector)), bus); self.increment_cycles(Cycles(5)); println!("Interrupt: {:?}", interrupt); diff --git a/src/emulator.rs b/src/emulator.rs index f709742..48ecd95 100644 --- a/src/emulator.rs +++ b/src/emulator.rs @@ -20,7 +20,6 @@ impl Emulator { } pub fn draw(&mut self, frame: &mut [u8]) { - // self.ppu.draw_background(&mut self.bus); let ppu_frame = self.ppu.get_rgba_frame(); for (i, pixel) in frame.chunks_exact_mut(4).enumerate() { pixel.copy_from_slice(&ppu_frame[i]); @@ -40,7 +39,6 @@ impl Emulator { while !exit { self.cpu.run(&mut self.bus); - // thread::sleep(time::Duration::from_millis(100)); // exit = self.cpu.get_exec_calls_count() >= 1258895; // log 1 // exit = self.cpu.get_exec_calls_count() >= 1068422; // log 3 // exit = self.cpu.get_exec_calls_count() >= 1262766; // log 4 diff --git a/src/timer.rs b/src/timer.rs new file mode 100644 index 0000000..00b4428 --- /dev/null +++ b/src/timer.rs @@ -0,0 +1,11 @@ +const DIVIDER_REGISTER_ADDRESS: u16 = 0xFF04; +const TIMER_COUNTER_ADDRESS: u16 = 0xFF05; +const TIMER_MODULO_ADDRESS: u16 = 0xFF05; +const TIMER_CONTROL_ADDRESS: u16 = 0xFF05; + +struct Timer; + +impl Timer { + pub fn cycle() { + } +}