mirror of
https://github.com/FranLMSP/rmg-001.git
synced 2024-11-23 10:12:11 +00:00
Experimental interrupts
This commit is contained in:
parent
f90900a4c1
commit
c77bc9db70
56
src/bus.rs
56
src/bus.rs
@ -6,7 +6,7 @@ use crate::utils::{
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};
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};
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use crate::rom::ROM;
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use crate::rom::ROM;
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use crate::ppu::{PPU, LCDStatus, LCDStatusModeFlag};
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use crate::ppu::{PPU, LCDStatus, LCDStatusModeFlag};
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use crate::cpu::{InterruptFlag};
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use crate::cpu::{Interrupt};
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pub struct AddressRange {
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pub struct AddressRange {
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begin: u16,
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begin: u16,
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@ -39,6 +39,7 @@ pub const NOT_USABLE: AddressRange = AddressRange{begin: 0xFEA0,
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pub const IO_REGISTERS: AddressRange = AddressRange{begin: 0xFF00, end: 0xFF7F};
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pub const IO_REGISTERS: AddressRange = AddressRange{begin: 0xFF00, end: 0xFF7F};
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pub const HIGH_RAM: AddressRange = AddressRange{begin: 0xFF80, end: 0xFFFE};
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pub const HIGH_RAM: AddressRange = AddressRange{begin: 0xFF80, end: 0xFFFE};
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pub const INTERRUPT_ENABLE_REGISTER: AddressRange = AddressRange{begin: 0xFFFF, end: 0xFFFF};
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pub const INTERRUPT_ENABLE_REGISTER: AddressRange = AddressRange{begin: 0xFFFF, end: 0xFFFF};
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pub const INTERRUPT_ENABLE_ADDRESS: u16 = 0xFFFF;
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pub const INTERRUPT_FLAG_ADDRESS: u16 = 0xFF0F;
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pub const INTERRUPT_FLAG_ADDRESS: u16 = 0xFF0F;
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pub struct Bus {
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pub struct Bus {
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@ -51,6 +52,7 @@ impl Bus {
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let game_rom = match ROM::load_file("ignore/tetris.gb".to_string()) {
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let game_rom = match ROM::load_file("ignore/tetris.gb".to_string()) {
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// let game_rom = match ROM::load_file("roms/cpu_instrs.gb".to_string()) {
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// let game_rom = match ROM::load_file("roms/cpu_instrs.gb".to_string()) {
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// let game_rom = match ROM::load_file("roms/cpu_instrs_individual/01-special.gb".to_string()) {
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// let game_rom = match ROM::load_file("roms/cpu_instrs_individual/01-special.gb".to_string()) {
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// let game_rom = match ROM::load_file("roms/cpu_instrs_individual/02-interrupts.gb".to_string()) {
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// let game_rom = match ROM::load_file("roms/cpu_instrs_individual/03-op sp,hl.gb".to_string()) {
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// let game_rom = match ROM::load_file("roms/cpu_instrs_individual/03-op sp,hl.gb".to_string()) {
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// let game_rom = match ROM::load_file("roms/cpu_instrs_individual/04-op r,imm.gb".to_string()) {
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// let game_rom = match ROM::load_file("roms/cpu_instrs_individual/04-op r,imm.gb".to_string()) {
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// let game_rom = match ROM::load_file("roms/cpu_instrs_individual/05-op rp.gb".to_string()) {
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// let game_rom = match ROM::load_file("roms/cpu_instrs_individual/05-op rp.gb".to_string()) {
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@ -75,7 +77,7 @@ impl Bus {
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return self.game_rom.read(address);
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return self.game_rom.read(address);
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} else if VIDEO_RAM.in_range(address) {
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} else if VIDEO_RAM.in_range(address) {
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if PPU::get_lcd_status(self, LCDStatus::ModeFlag(LCDStatusModeFlag::TransferringToLCD)) {
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if PPU::get_lcd_status(self, LCDStatus::ModeFlag(LCDStatusModeFlag::TransferringToLCD)) {
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return 0xFF
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return 0xFF;
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}
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}
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} else if IO_REGISTERS.in_range(address) {
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} else if IO_REGISTERS.in_range(address) {
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return self.data[address as usize];
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return self.data[address as usize];
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@ -104,7 +106,7 @@ impl Bus {
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self.data[address as usize] = data;
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self.data[address as usize] = data;
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self.data[(WORK_RAM_1.begin() + (address - ECHO_RAM.begin())) as usize] = data; // Copy to the working RAM
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self.data[(WORK_RAM_1.begin() + (address - ECHO_RAM.begin())) as usize] = data; // Copy to the working RAM
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} else if VIDEO_RAM.in_range(address) {
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} else if VIDEO_RAM.in_range(address) {
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//if !PPU::get_lcd_status(self, LCDStatus::ModeFlag(LCDStatusModeFlag::TransferringToLCD)) {
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// if !PPU::get_lcd_status(self, LCDStatus::ModeFlag(LCDStatusModeFlag::TransferringToLCD)) {
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self.data[address as usize] = data;
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self.data[address as usize] = data;
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// }
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// }
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} else {
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} else {
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@ -118,14 +120,46 @@ impl Bus {
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self.write(address.wrapping_add(1), bytes[1]);
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self.write(address.wrapping_add(1), bytes[1]);
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}
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}
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pub fn set_flag(&mut self, flag: InterruptFlag, val: bool) {
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pub fn set_interrupt_master(&mut self, flag: Interrupt, val: bool) {
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let byte = self.read(INTERRUPT_FLAG_ADDRESS);
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let byte = self.read(INTERRUPT_ENABLE_ADDRESS);
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self.write(INTERRUPT_FLAG_ADDRESS, match flag {
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self.write(INTERRUPT_ENABLE_ADDRESS, match flag {
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InterruptFlag::VBlank => set_bit(byte, val, BitIndex::I0),
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Interrupt::VBlank => set_bit(byte, val, BitIndex::I0),
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InterruptFlag::LCDSTAT => set_bit(byte, val, BitIndex::I1),
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Interrupt::LCDSTAT => set_bit(byte, val, BitIndex::I1),
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InterruptFlag::Timer => set_bit(byte, val, BitIndex::I2),
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Interrupt::Timer => set_bit(byte, val, BitIndex::I2),
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InterruptFlag::Serial => set_bit(byte, val, BitIndex::I3),
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Interrupt::Serial => set_bit(byte, val, BitIndex::I3),
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InterruptFlag::Joypad => set_bit(byte, val, BitIndex::I4),
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Interrupt::Joypad => set_bit(byte, val, BitIndex::I4),
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});
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});
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}
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}
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pub fn set_interrupt(&mut self, flag: Interrupt, val: bool) {
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let byte = self.read(INTERRUPT_FLAG_ADDRESS);
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self.write(INTERRUPT_FLAG_ADDRESS, match flag {
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Interrupt::VBlank => set_bit(byte, val, BitIndex::I0),
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Interrupt::LCDSTAT => set_bit(byte, val, BitIndex::I1),
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Interrupt::Timer => set_bit(byte, val, BitIndex::I2),
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Interrupt::Serial => set_bit(byte, val, BitIndex::I3),
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Interrupt::Joypad => set_bit(byte, val, BitIndex::I4),
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});
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}
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pub fn get_interrupt(&mut self, flag: Interrupt) -> bool {
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let byte = self.read(INTERRUPT_ENABLE_ADDRESS) & self.read(INTERRUPT_FLAG_ADDRESS);
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match flag {
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Interrupt::VBlank => get_bit(byte, BitIndex::I0),
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Interrupt::LCDSTAT => get_bit(byte, BitIndex::I1),
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Interrupt::Timer => get_bit(byte, BitIndex::I2),
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Interrupt::Serial => get_bit(byte, BitIndex::I3),
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Interrupt::Joypad => get_bit(byte, BitIndex::I4),
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}
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}
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pub fn get_interrupt_vector(flag: Interrupt) -> u16 {
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match flag {
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Interrupt::VBlank => 0x40,
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Interrupt::LCDSTAT => 0x48,
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Interrupt::Timer => 0x50,
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Interrupt::Serial => 0x58,
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Interrupt::Joypad => 0x60,
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}
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}
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}
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}
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62
src/cpu.rs
62
src/cpu.rs
@ -8,7 +8,7 @@ use crate::utils::{
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sub_half_carry,
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sub_half_carry,
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add_half_carry_16bit,
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add_half_carry_16bit,
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};
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};
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use crate::bus::Bus;
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use crate::bus::{Bus, INTERRUPT_ENABLE_ADDRESS, INTERRUPT_FLAG_ADDRESS};
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#[derive(Debug, Copy, Clone)]
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#[derive(Debug, Copy, Clone)]
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pub enum Register {
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pub enum Register {
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@ -53,7 +53,8 @@ pub enum FlagRegister {
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Carry, // Set if a carry was ocurrend from the last math operation or if register A is the smaller value when executing the CP instruction
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Carry, // Set if a carry was ocurrend from the last math operation or if register A is the smaller value when executing the CP instruction
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}
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}
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pub enum InterruptFlag {
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#[derive(Debug, Copy, Clone)]
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pub enum Interrupt {
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VBlank,
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VBlank,
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LCDSTAT,
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LCDSTAT,
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Timer,
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Timer,
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@ -61,18 +62,6 @@ pub enum InterruptFlag {
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Joypad,
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Joypad,
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}
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}
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impl InterruptFlag {
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pub fn get_bit_index(interrupt: InterruptFlag) -> BitIndex {
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match interrupt {
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InterruptFlag::VBlank => BitIndex::I0,
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InterruptFlag::LCDSTAT => BitIndex::I1,
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InterruptFlag::Timer => BitIndex::I2,
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InterruptFlag::Serial => BitIndex::I3,
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InterruptFlag::Joypad => BitIndex::I4,
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}
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}
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}
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pub struct Registers {
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pub struct Registers {
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a: u8,
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a: u8,
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f: u8,
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f: u8,
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@ -837,8 +826,11 @@ impl CPU {
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}
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}
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fn increment_cycles(&mut self, cycles: Cycles) {
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fn increment_cycles(&mut self, cycles: Cycles) {
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let Cycles(c) = cycles;
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self.cycles.0 += cycles.0;
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self.cycles.0 += c;
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}
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fn decrement_cycles(&mut self, cycles: Cycles) {
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self.cycles.0 -= cycles.0;
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}
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}
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pub fn reset_cycles(&mut self) {
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pub fn reset_cycles(&mut self) {
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@ -876,6 +868,34 @@ impl CPU {
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);
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);
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}
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}
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pub fn handle_interrupt(&mut self, bus: &mut Bus, interrupt: Interrupt) {
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bus.set_interrupt_master(interrupt, false);
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bus.set_interrupt(interrupt, false);
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let vector = Bus::get_interrupt_vector(interrupt);
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self.exec(Opcode::CALL(OpcodeParameter::U16(vector)), bus);
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self.decrement_cycles(Cycles(1));
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}
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pub fn check_interrupt(&mut self, bus: &mut Bus) -> bool {
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if bus.get_interrupt(Interrupt::VBlank) {
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self.handle_interrupt(bus, Interrupt::VBlank);
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return true;
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} else if bus.get_interrupt(Interrupt::LCDSTAT) {
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self.handle_interrupt(bus, Interrupt::LCDSTAT);
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return true;
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} else if bus.get_interrupt(Interrupt::Timer) {
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self.handle_interrupt(bus, Interrupt::Timer);
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return true;
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} else if bus.get_interrupt(Interrupt::Serial) {
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self.handle_interrupt(bus, Interrupt::Serial);
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return true;
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} else if bus.get_interrupt(Interrupt::Joypad) {
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self.handle_interrupt(bus, Interrupt::Joypad);
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return true;
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}
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return false;
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}
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pub fn run(&mut self, bus: &mut Bus) {
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pub fn run(&mut self, bus: &mut Bus) {
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let cycles_start = self.get_cycles();
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let cycles_start = self.get_cycles();
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let program_counter = self.registers.get(Register::PC);
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let program_counter = self.registers.get(Register::PC);
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@ -885,11 +905,11 @@ impl CPU {
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self.log(parameter_bytes);
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self.log(parameter_bytes);
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}
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}
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self.increment_cycles(cycles);
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self.increment_cycles(cycles);
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self.exec(opcode, bus);
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if !self.check_interrupt(bus) {
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self.exec(opcode, bus);
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}
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let cycles_end = self.get_cycles();
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let cycles_end = self.get_cycles();
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self.set_last_op_cycles(cycles_start, cycles_end);
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self.set_last_op_cycles(cycles_start, cycles_end);
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// self.increment_exec_calls_count();
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}
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}
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pub fn exec(&mut self, opcode: Opcode, bus: &mut Bus) {
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pub fn exec(&mut self, opcode: Opcode, bus: &mut Bus) {
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@ -1713,12 +1733,12 @@ impl CPU {
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// Enable interrupts
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// Enable interrupts
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Opcode::EI => {
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Opcode::EI => {
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self.registers.increment(Register::PC, 1);
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self.registers.increment(Register::PC, 1);
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bus.write(0xFFFF, 0xFF); // Disable all interrupts
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bus.write(INTERRUPT_ENABLE_ADDRESS, 0xFF); // Disable all interrupts
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},
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},
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// Disable interrupts
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// Disable interrupts
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Opcode::DI => {
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Opcode::DI => {
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self.registers.increment(Register::PC, 1);
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self.registers.increment(Register::PC, 1);
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bus.write(0xFFFF, 0x00); // Disable all interrupts
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bus.write(INTERRUPT_ENABLE_ADDRESS, 0x00); // Disable all interrupts
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},
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},
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// Same as enabling interrupts and then executing RET
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// Same as enabling interrupts and then executing RET
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Opcode::RETI => {
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Opcode::RETI => {
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@ -30,8 +30,8 @@ impl Emulator {
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pub fn run(&mut self, cpu_cycles: Cycles) {
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pub fn run(&mut self, cpu_cycles: Cycles) {
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self.cpu.reset_cycles();
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self.cpu.reset_cycles();
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while self.cpu.get_cycles().0 <= cpu_cycles.0 {
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while self.cpu.get_cycles().0 <= cpu_cycles.0 {
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self.ppu.do_cycle(&mut self.bus);
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self.cpu.run(&mut self.bus);
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self.cpu.run(&mut self.bus);
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self.ppu.do_cycles(&mut self.bus, self.cpu.get_last_op_cycles());
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}
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}
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}
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}
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48
src/ppu.rs
48
src/ppu.rs
@ -5,7 +5,7 @@ use crate::utils::{
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to_bit_index,
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to_bit_index,
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};
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};
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use crate::bus::{Bus, AddressRange, BANK_ZERO, VIDEO_RAM};
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use crate::bus::{Bus, AddressRange, BANK_ZERO, VIDEO_RAM};
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use crate::cpu::{Cycles, InterruptFlag};
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use crate::cpu::{Cycles, Interrupt};
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#[derive(Debug, Copy, Clone)]
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#[derive(Debug, Copy, Clone)]
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enum Pixel {
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enum Pixel {
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@ -87,25 +87,31 @@ impl PPU {
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self.cycles.0 += cycles.0;
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self.cycles.0 += cycles.0;
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}
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}
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pub fn do_cycle(&mut self, bus: &mut Bus) {
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pub fn do_cycles(&mut self, bus: &mut Bus, cycles: Cycles) {
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let mut count = 0;
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while count < cycles.0 {
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self.cycle(bus);
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count += 1;
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}
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}
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pub fn cycle(&mut self, bus: &mut Bus) {
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// Mode 1 Vertical blank
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// Mode 1 Vertical blank
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if PPU::get_lcd_y(bus) >= 144 {
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if PPU::get_lcd_y(bus) >= 144 {
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if PPU::get_lcd_y(bus) == 144 {
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bus.set_interrupt(Interrupt::VBlank, true);
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bus.set_flag(InterruptFlag::VBlank, true);
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PPU::set_lcd_status(bus, LCDStatus::ModeFlag(LCDStatusModeFlag::VBlank), true);
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PPU::set_lcd_status(bus, LCDStatus::ModeFlag(LCDStatusModeFlag::VBlank), true);
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}
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} else {
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} else {
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if self.cycles.0 == 0 {
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if self.cycles.0 == 0 {
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// Mode 2 OAM scan
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// Mode 2 OAM scan
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PPU::set_lcd_status(bus, LCDStatus::ModeFlag(LCDStatusModeFlag::SearchingOAM), true);
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PPU::set_lcd_status(bus, LCDStatus::ModeFlag(LCDStatusModeFlag::SearchingOAM), true);
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} else if self.cycles.0 == 80 + 1 {
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} else if self.cycles.0 == 80 + 1 {
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// Mode 3 drawing pixel line. This could also last 289 cycles
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// Mode 3 drawing pixel line. This could also last 289 cycles
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bus.set_flag(InterruptFlag::LCDSTAT, true);
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bus.set_interrupt(Interrupt::LCDSTAT, true);
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self.draw_line(bus);
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self.draw_line(bus);
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PPU::set_lcd_status(bus, LCDStatus::ModeFlag(LCDStatusModeFlag::TransferringToLCD), true);
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PPU::set_lcd_status(bus, LCDStatus::ModeFlag(LCDStatusModeFlag::TransferringToLCD), true);
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} else if self.cycles.0 == 80 + 172 + 1 {
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} else if self.cycles.0 == 80 + 172 + 1 {
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// Mode 0 Horizontal blank. This could last 87 or 204 cycles depending on the mode 3
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// Mode 0 Horizontal blank. This could last 87 or 204 cycles depending on the mode 3
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bus.set_flag(InterruptFlag::LCDSTAT, true);
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bus.set_interrupt(Interrupt::LCDSTAT, true);
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PPU::set_lcd_status(bus, LCDStatus::ModeFlag(LCDStatusModeFlag::HBlank), true);
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PPU::set_lcd_status(bus, LCDStatus::ModeFlag(LCDStatusModeFlag::HBlank), true);
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}
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}
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}
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}
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@ -113,7 +119,7 @@ impl PPU {
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let lyc_compare = PPU::get_lcd_y(bus) == bus.read(LCD_Y_COMPARE_ADDRESS);
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let lyc_compare = PPU::get_lcd_y(bus) == bus.read(LCD_Y_COMPARE_ADDRESS);
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PPU::set_lcd_status(bus, LCDStatus::LYCInterrupt, lyc_compare);
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PPU::set_lcd_status(bus, LCDStatus::LYCInterrupt, lyc_compare);
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if lyc_compare {
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if lyc_compare {
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bus.set_flag(InterruptFlag::LCDSTAT, true);
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bus.set_interrupt(Interrupt::LCDSTAT, true);
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}
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}
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self.increment_cycles(Cycles(1));
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self.increment_cycles(Cycles(1));
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@ -186,15 +192,15 @@ impl PPU {
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pub fn get_lcd_status(bus: &Bus, status: LCDStatus) -> bool {
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pub fn get_lcd_status(bus: &Bus, status: LCDStatus) -> bool {
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let byte = bus.read(LCD_STATUS_ADDRESS);
|
let byte = bus.read(LCD_STATUS_ADDRESS);
|
||||||
match status {
|
match status {
|
||||||
LCDStatus::LYCInterrupt => get_bit(byte, BitIndex::I6),
|
LCDStatus::LYCInterrupt => get_bit(byte, BitIndex::I6),
|
||||||
LCDStatus::Mode2OAMInterrupt => get_bit(byte, BitIndex::I5),
|
LCDStatus::Mode2OAMInterrupt => get_bit(byte, BitIndex::I5),
|
||||||
LCDStatus::Mode1VBlankInterrupt => get_bit(byte, BitIndex::I4),
|
LCDStatus::Mode1VBlankInterrupt => get_bit(byte, BitIndex::I4),
|
||||||
LCDStatus::Mode0HBlankInterrupt => get_bit(byte, BitIndex::I3),
|
LCDStatus::Mode0HBlankInterrupt => get_bit(byte, BitIndex::I3),
|
||||||
LCDStatus::LYCFlag => get_bit(byte, BitIndex::I2),
|
LCDStatus::LYCFlag => get_bit(byte, BitIndex::I2),
|
||||||
LCDStatus::ModeFlag(mode) => match mode {
|
LCDStatus::ModeFlag(mode) => match mode {
|
||||||
LCDStatusModeFlag::HBlank => (byte & 0b00000011) == 0,
|
LCDStatusModeFlag::HBlank => (byte & 0b00000011) == 0,
|
||||||
LCDStatusModeFlag::VBlank => (byte & 0b00000011) == 1,
|
LCDStatusModeFlag::VBlank => (byte & 0b00000011) == 1,
|
||||||
LCDStatusModeFlag::SearchingOAM => (byte & 0b00000011) == 2,
|
LCDStatusModeFlag::SearchingOAM => (byte & 0b00000011) == 2,
|
||||||
LCDStatusModeFlag::TransferringToLCD => (byte & 0b00000011) == 3,
|
LCDStatusModeFlag::TransferringToLCD => (byte & 0b00000011) == 3,
|
||||||
},
|
},
|
||||||
}
|
}
|
||||||
@ -203,15 +209,15 @@ impl PPU {
|
|||||||
fn set_lcd_status(bus: &mut Bus, status: LCDStatus, val: bool) {
|
fn set_lcd_status(bus: &mut Bus, status: LCDStatus, val: bool) {
|
||||||
let mut byte = bus.read(LCD_STATUS_ADDRESS);
|
let mut byte = bus.read(LCD_STATUS_ADDRESS);
|
||||||
byte = match status {
|
byte = match status {
|
||||||
LCDStatus::LYCInterrupt => set_bit(byte, val, BitIndex::I6),
|
LCDStatus::LYCInterrupt => set_bit(byte, val, BitIndex::I6),
|
||||||
LCDStatus::Mode2OAMInterrupt => set_bit(byte, val, BitIndex::I5),
|
LCDStatus::Mode2OAMInterrupt => set_bit(byte, val, BitIndex::I5),
|
||||||
LCDStatus::Mode1VBlankInterrupt => set_bit(byte, val, BitIndex::I4),
|
LCDStatus::Mode1VBlankInterrupt => set_bit(byte, val, BitIndex::I4),
|
||||||
LCDStatus::Mode0HBlankInterrupt => set_bit(byte, val, BitIndex::I3),
|
LCDStatus::Mode0HBlankInterrupt => set_bit(byte, val, BitIndex::I3),
|
||||||
LCDStatus::LYCFlag => set_bit(byte, val, BitIndex::I2),
|
LCDStatus::LYCFlag => set_bit(byte, val, BitIndex::I2),
|
||||||
LCDStatus::ModeFlag(mode) => match mode {
|
LCDStatus::ModeFlag(mode) => match mode {
|
||||||
LCDStatusModeFlag::HBlank => (byte & 0b11111100) | 0,
|
LCDStatusModeFlag::HBlank => (byte & 0b11111100) | 0,
|
||||||
LCDStatusModeFlag::VBlank => (byte & 0b11111100) | 1,
|
LCDStatusModeFlag::VBlank => (byte & 0b11111100) | 1,
|
||||||
LCDStatusModeFlag::SearchingOAM => (byte & 0b11111100) | 2,
|
LCDStatusModeFlag::SearchingOAM => (byte & 0b11111100) | 2,
|
||||||
LCDStatusModeFlag::TransferringToLCD => (byte & 0b11111100) | 3,
|
LCDStatusModeFlag::TransferringToLCD => (byte & 0b11111100) | 3,
|
||||||
},
|
},
|
||||||
};
|
};
|
||||||
|
Loading…
Reference in New Issue
Block a user