From d90a25e6f671e4eaab3832eb843dc95545378725 Mon Sep 17 00:00:00 2001
From: Franco Colmenarez <info@francoacg.com>
Date: Fri, 12 Nov 2021 19:52:46 -0500
Subject: [PATCH] Fix LCD status when turned on or off

---
 src/bus.rs |  8 ++++++--
 src/cpu.rs |  2 +-
 src/ppu.rs |  2 +-
 src/rom.rs | 39 ++++++++++++++++++++++++++++++---------
 4 files changed, 38 insertions(+), 13 deletions(-)

diff --git a/src/bus.rs b/src/bus.rs
index 349eaae..aeba716 100644
--- a/src/bus.rs
+++ b/src/bus.rs
@@ -138,9 +138,13 @@ impl Bus {
             self.reset_timer = true;
         } else if address == LCD_CONTROL_ADDRESS {
             self.data[address as usize] = data;
-            // Check if LCD is being turned on 
-            if get_bit(data, BitIndex::I7) && !get_bit(self.data[address as usize], BitIndex::I7) {
+            // Check if LCD is being turned on or off
+            if (get_bit(data, BitIndex::I7) && !get_bit(self.data[address as usize], BitIndex::I7)) ||
+               !get_bit(data, BitIndex::I7) {
                 self.data[LCD_Y_ADDRESS as usize] = 0x00;
+                // Set Hblank
+                let byte = self.data[LCD_STATUS_ADDRESS as usize];
+                self.data[LCD_STATUS_ADDRESS as usize] = byte & 0b11111100;
             }
         } else if address == LCD_Y_ADDRESS {
             // println!("Write to LCD_Y not allowed");
diff --git a/src/cpu.rs b/src/cpu.rs
index 94215ff..9617977 100644
--- a/src/cpu.rs
+++ b/src/cpu.rs
@@ -857,7 +857,7 @@ impl CPU {
             is_halted: false,
             ei_delay: false,
             ime: true,
-            enable_logs: !env::var("CPU_LOG").is_err(),
+            enable_logs: !env::var("CPU_LOG").is_err() || !env::var("CPU_LOGS").is_err(),
         }
     }
 
diff --git a/src/ppu.rs b/src/ppu.rs
index e355ee1..f6ba65e 100644
--- a/src/ppu.rs
+++ b/src/ppu.rs
@@ -23,8 +23,8 @@ pub const DMA_ADDRESS: u16 = 0xFF46;
 pub const BACKGROUND_PALETTE_ADDRESS: u16 = 0xFF47;
 pub const OBJECT_PALETTE_0_ADDRESS: u16 = 0xFF48;
 pub const OBJECT_PALETTE_1_ADDRESS: u16 = 0xFF49;
-pub const WINDOW_X_ADDRESS: u16 = 0xFF4B;
 pub const WINDOW_Y_ADDRESS: u16 = 0xFF4A;
+pub const WINDOW_X_ADDRESS: u16 = 0xFF4B;
 pub const TILE_MAP_ADDRESS: u16 = 0x9800;
 
 #[derive(Debug, Copy, Clone)]
diff --git a/src/rom.rs b/src/rom.rs
index ef4c497..51f0b46 100644
--- a/src/rom.rs
+++ b/src/rom.rs
@@ -14,6 +14,7 @@ pub const RAM_SIZE_ADDRESS: u16 = 0x0149;
 pub const ROM_SIZE_ADDRESS: u16 = 0x0148;
 pub const DESTINATION_CODE_ADDRESS: u16 = 0x014A;
 
+#[derive(Debug)]
 enum Region {
     Japanese,
     NonJapanese,
@@ -37,11 +38,13 @@ enum MBC {
     BandaiTIMA5,
 }
 
+#[derive(Debug)]
 enum BankingMode {
     Simple,
     Advanced,
 }
 
+#[derive(Debug)]
 pub struct ROMInfo {
     mbc: MBC,
     publisher: String,
@@ -139,7 +142,7 @@ impl ROMInfo {
     }
 
     pub fn ram_size(&self) -> usize {
-        0x4000 * self.ram_banks as usize
+        0x2000 * self.ram_banks as usize
     }
 }
 
@@ -160,8 +163,11 @@ impl ROM {
         file.read_to_end(&mut data)?;
 
         let info = ROMInfo::from_bytes(&data);
-        println!("has ram {}", info.has_ram);
-        println!("mbc {:?}", info.mbc);
+        println!("MBC {:?}", info.mbc);
+        println!("Has RAM {}", info.has_ram);
+        println!("ROM banks {}", info.rom_banks);
+        println!("RAM banks {}", info.ram_banks);
+        println!("Region {:?}", info.region);
         let ram = Vec::with_capacity(info.ram_size() as usize);
 
         Ok(Self {
@@ -177,6 +183,12 @@ impl ROM {
 
     pub fn read(&self, address: u16) -> u8 {
         match self.info.mbc {
+            MBC::NoMBC => {
+                return match self.data.get(address as usize) {
+                    Some(data) => *data,
+                    None => 0xFF,
+                };
+            },
             MBC::MBC1 => {
                 if BANK_ZERO.in_range(address) {
                     return self.data[address as usize];
@@ -188,19 +200,26 @@ impl ROM {
                     if !self.info.has_ram {
                         return 0xFF;
                     }
-                    return self.ram[(address - EXTERNAL_RAM.begin() + (EXTERNAL_RAM.begin() * self.ram_bank as u16)) as usize];
+                    return match self.ram.get((address - EXTERNAL_RAM.begin() + (0x2000 * self.ram_bank as u16)) as usize) {
+                        Some(data) => *data,
+                        None => 0xFF,
+                    };
                 }
+                unreachable!("ROM read: Address {} not valid", address);
             },
-            _ => {},
+            _ => unimplemented!(),
         }
         self.data[address as usize]
     }
 
     pub fn write(&mut self, address: u16, data: u8) {
         match self.info.mbc {
+            MBC::NoMBC => {},
             MBC::MBC1 => {
-                
                 if address >= 0x0000 && address <= 0x1FFF { // RAM enable register
+                    if !self.info.has_ram {
+                        return;
+                    }
                     self.ram_enable = match data & 0x0F {
                         0x0A => true,
                         _ => false,
@@ -218,12 +237,14 @@ impl ROM {
                     if !self.ram_enable || !self.info.has_ram {
                         return;
                     }
-                    let address = (address - EXTERNAL_RAM.begin() + (EXTERNAL_RAM.begin() * self.ram_bank as u16)) as usize;
-                    self.ram[address] = data;
+                    let address = address as usize - EXTERNAL_RAM.begin() as usize + (EXTERNAL_RAM.begin() as usize * self.ram_bank as usize);
+                    if let Some(elem) = self.ram.get_mut(address) {
+                        *elem = data;
+                    }
                     self.switch_rom_bank(self.rom_bank + (data as u16 >> 5));
                 }
             },
-            _ => {},
+            _ => unimplemented!(),
         }
     }