From dbe95bedf27b9506171b4781e71701c081a36632 Mon Sep 17 00:00:00 2001 From: Franco Colmenarez Date: Thu, 14 Oct 2021 23:58:51 -0500 Subject: [PATCH] Increment and decrement instructions --- src/cpu.rs | 37 +++++++++++++++++++++++++++++++++++-- src/utils.rs | 1 + 2 files changed, 36 insertions(+), 2 deletions(-) diff --git a/src/cpu.rs b/src/cpu.rs index 136045f..3cccbcf 100644 --- a/src/cpu.rs +++ b/src/cpu.rs @@ -1,4 +1,11 @@ -use crate::utils::{BitIndex, get_bit, set_bit, join_bytes}; +use crate::utils::{ + BitIndex, + get_bit, + set_bit, + join_bytes, + add_half_carry, + sub_half_carry +}; use crate::bus::Bus; #[derive(Debug, Copy, Clone)] @@ -289,6 +296,10 @@ impl CPU { let prev_value = self.registers.get(register); self.registers.increment(register, 1); if affect_flags { + self.registers.set_flag(FlagRegister::Substract, false); + if add_half_carry(prev_value.to_be_bytes()[1], 1) { + self.registers.set_flag(FlagRegister::HalfCarry, true); + } let result = self.registers.get(register); if result == 0 { self.registers.set_flag(FlagRegister::Zero, true); @@ -301,6 +312,10 @@ impl CPU { let prev_value = self.registers.get(register); self.registers.decrement(register, 1); if affect_flags { + self.registers.set_flag(FlagRegister::Substract, true); + if sub_half_carry(prev_value.to_be_bytes()[1], 1) { + self.registers.set_flag(FlagRegister::HalfCarry, true); + } let result = self.registers.get(register); if result == 0 { self.registers.set_flag(FlagRegister::Zero, true); @@ -774,13 +789,31 @@ mod tests { assert_eq!(cpu.registers.get_flag(FlagRegister::Substract), false); assert_eq!(cpu.registers.get_flag(FlagRegister::HalfCarry), false); assert_eq!(cpu.registers.get(Register::PC), 0x101); + let mut cpu = CPU::new(); + cpu.registers.set(Register::A, 0b00001111); + cpu.exec(Opcode::INC(true, Register::A), &mut bus); + assert_eq!(cpu.registers.get_flag(FlagRegister::Zero), false); + assert_eq!(cpu.registers.get_flag(FlagRegister::Substract), false); + //assert_eq!(cpu.registers.get_flag(FlagRegister::HalfCarry), true); + assert_eq!(cpu.registers.get(Register::PC), 0x101); // DEC let mut cpu = CPU::new(); cpu.registers.set(Register::A, 1); - cpu.exec(Opcode::DEC(false, Register::A), &mut bus); + cpu.exec(Opcode::DEC(true, Register::A), &mut bus); + assert_eq!(cpu.registers.get_flag(FlagRegister::Zero), true); + assert_eq!(cpu.registers.get_flag(FlagRegister::Substract), true); + assert_eq!(cpu.registers.get_flag(FlagRegister::HalfCarry), false); assert_eq!(cpu.registers.get(Register::A), 0); assert_eq!(cpu.registers.get(Register::PC), 0x101); + let mut cpu = CPU::new(); + cpu.registers.set(Register::A, 0b00010000); + cpu.exec(Opcode::DEC(true, Register::A), &mut bus); + assert_eq!(cpu.registers.get_flag(FlagRegister::Zero), false); + assert_eq!(cpu.registers.get_flag(FlagRegister::Substract), true); + assert_eq!(cpu.registers.get_flag(FlagRegister::HalfCarry), true); + assert_eq!(cpu.registers.get(Register::A), 0b00001111); + assert_eq!(cpu.registers.get(Register::PC), 0x101); // NOP let mut cpu = CPU::new(); diff --git a/src/utils.rs b/src/utils.rs index 4bccbfb..6caf1b9 100644 --- a/src/utils.rs +++ b/src/utils.rs @@ -113,6 +113,7 @@ mod tests { assert_eq!(add_half_carry(0b00000100, 0b00001100), true); assert_eq!(add_half_carry(0b00000100, 0b00000100), false); assert_eq!(add_half_carry(0b00000100, 0b00001000), false); + assert_eq!(add_half_carry(0b00001111, 0b00000001), true); assert_eq!(sub_half_carry(0b00010000, 0b00001000), true); assert_eq!(sub_half_carry(0b00000000, 0b00000001), true);