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BIT instruction

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This commit is contained in:
Franco Colmenarez 2021-10-19 09:53:50 -05:00
parent a64d15c9ce
commit edc8429aa2
2 changed files with 46 additions and 3 deletions
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6
src/bus.rs
View File

@ -92,8 +92,8 @@ impl Bus {
} }
pub fn write_16bit(&mut self, address: u16, data: u16) { pub fn write_16bit(&mut self, address: u16, data: u16) {
let bytes = data.to_be_bytes(); let bytes = data.to_le_bytes();
self.write(address, bytes[1]); self.write(address, bytes[0]);
self.write(address + 1, bytes[0]); self.write(address + 1, bytes[1]);
} }
} }

43
src/cpu.rs
View File

@ -987,6 +987,17 @@ impl CPU {
self.registers.set_flag(FlagRegister::Substract, false); self.registers.set_flag(FlagRegister::Substract, false);
self.registers.set_flag(FlagRegister::HalfCarry, false); self.registers.set_flag(FlagRegister::HalfCarry, false);
}, },
Opcode::BIT(index, register) => {
let mut val = 0;
match register.is_8bit() {
true => val = self.registers.get_8bit(register),
false => val = bus.read(self.registers.get(register)),
};
let res = get_bit(val, index);
self.registers.set_flag(FlagRegister::Zero, !res);
self.registers.set_flag(FlagRegister::Substract, false);
self.registers.set_flag(FlagRegister::HalfCarry, true);
},
_ => {}, _ => {},
}; };
}, },
@ -2868,6 +2879,38 @@ mod tests {
assert_eq!(cpu.registers.get(Register::PC), 0x102); assert_eq!(cpu.registers.get(Register::PC), 0x102);
} }
#[test]
fn test_prefix_cb_bit_instruction() {
let mut bus = Bus::new();
let mut cpu = CPU::new();
cpu.registers.set(Register::A, 0b11110101);
cpu.exec(Opcode::PrefixCB(Box::new(Opcode::BIT(BitIndex::I3, Register::A))), &mut bus);
assert_eq!(cpu.registers.get_flag(FlagRegister::Zero), true);
assert_eq!(cpu.registers.get_flag(FlagRegister::Substract), false);
assert_eq!(cpu.registers.get_flag(FlagRegister::HalfCarry), true);
assert_eq!(cpu.registers.get(Register::PC), 0x102);
let mut bus = Bus::new();
let mut cpu = CPU::new();
cpu.registers.set(Register::A, 0b11110101);
cpu.exec(Opcode::PrefixCB(Box::new(Opcode::BIT(BitIndex::I4, Register::A))), &mut bus);
assert_eq!(cpu.registers.get_flag(FlagRegister::Zero), false);
assert_eq!(cpu.registers.get_flag(FlagRegister::Substract), false);
assert_eq!(cpu.registers.get_flag(FlagRegister::HalfCarry), true);
assert_eq!(cpu.registers.get(Register::PC), 0x102);
let mut bus = Bus::new();
let mut cpu = CPU::new();
let addr = 0xC000;
cpu.registers.set(Register::HL, addr);
bus.write(addr, 0b11110101);
cpu.exec(Opcode::PrefixCB(Box::new(Opcode::BIT(BitIndex::I0 ,Register::HL))), &mut bus);
assert_eq!(cpu.registers.get_flag(FlagRegister::Zero), false);
assert_eq!(cpu.registers.get_flag(FlagRegister::Substract), false);
assert_eq!(cpu.registers.get_flag(FlagRegister::HalfCarry), true);
assert_eq!(cpu.registers.get(Register::PC), 0x102);
}
#[test] #[test]
fn test_daa_instruction() { fn test_daa_instruction() {
let mut bus = Bus::new(); let mut bus = Bus::new();