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3f2824714f
...
060dbde966
29
src/bus.rs
29
src/bus.rs
@ -1,7 +1,6 @@
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use std::ops::RangeInclusive;
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use crate::utils::join_bytes;
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use crate::rom::{ROM, load_rom};
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use crate::ram::{RAM, DMGRAM, CGBRAM, WRAM_BANK_SELECT_ADDRESS};
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use crate::ppu::{
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PPU,
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DMA_ADDRESS,
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@ -30,7 +29,6 @@ pub const HIGH_RAM: RangeInclusive<u16> = 0xFF80..=0xFFFE;
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pub struct Bus {
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data: [u8; 0x10000],
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pub rom: Box<dyn ROM>,
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pub ram: Box<dyn RAM>,
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pub ppu: PPU,
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pub joypad: Joypad,
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pub timer: Timer,
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@ -53,16 +51,10 @@ impl Bus {
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std::process::exit(1);
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},
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};
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let info = rom.info().clone();
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let cgb_mode = info.cgb_features() || info.cgb_only();
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let mut bus = Self {
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data: [0x00; 0x10000],
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rom,
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ram: match cgb_mode {
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true => Box::new(CGBRAM::new()),
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false => Box::new(DMGRAM::new()),
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},
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ppu: PPU::new(cgb_mode),
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ppu: PPU::new(),
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joypad: Joypad::new(),
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timer: Timer::new(),
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sound: Sound::new(),
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@ -98,14 +90,10 @@ impl Bus {
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pub fn read(&self, address: u16) -> u8 {
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if BANK_ZERO.contains(&address) || BANK_SWITCHABLE.contains(&address) || EXTERNAL_RAM.contains(&address) {
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return self.rom.read(address);
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} else if WORK_RAM_1.contains(&address) || WORK_RAM_2.contains(&address) || address == WRAM_BANK_SELECT_ADDRESS {
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return self.ram.read(address);
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} else if ECHO_RAM.contains(&address) {
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return self.ram.read(WORK_RAM_1.min().unwrap() + ((address - ECHO_RAM.min().unwrap()) & 0x1FFF));
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} else if address == INTERRUPT_ENABLE_ADDRESS || address == INTERRUPT_FLAG_ADDRESS {
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return self.interrupts.read(address);
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} else if VIDEO_RAM.contains(&address) {
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return self.ppu.read_vram_external(address);
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return self.ppu.read_vram(address);
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} else if SPRITE_ATTRIBUTE_TABLE.contains(&address) {
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return self.ppu.read_oam(address);
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} else if PPU::is_io_register(address) {
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@ -133,12 +121,17 @@ impl Bus {
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self.rom.write(address, data);
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} else if address == INTERRUPT_ENABLE_ADDRESS || address == INTERRUPT_FLAG_ADDRESS {
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self.interrupts.write(address, data);
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} else if WORK_RAM_1.contains(&address) || WORK_RAM_2.contains(&address) || address == WRAM_BANK_SELECT_ADDRESS {
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self.ram.write(address, data);
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} else if WORK_RAM_1.contains(&address) || WORK_RAM_2.contains(&address) {
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self.data[address as usize] = data;
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// Copy to the ECHO RAM
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if address <= 0xDDFF {
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self.data[(ECHO_RAM.min().unwrap() + (address - WORK_RAM_1.min().unwrap())) as usize] = data;
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}
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} else if EXTERNAL_RAM.contains(&address) {
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self.rom.write(address, data);
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} else if ECHO_RAM.contains(&address) {
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self.ram.write(WORK_RAM_1.min().unwrap() + ((address - ECHO_RAM.min().unwrap()) & 0x1FFF), data);
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self.data[address as usize] = data;
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self.data[(WORK_RAM_1.min().unwrap() + (address - ECHO_RAM.min().unwrap())) as usize] = data; // Copy to the working RAM
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} else if Timer::is_io_register(address) {
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self.timer.set_register(address, data);
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} else if Sound::is_io_register(address) {
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@ -147,7 +140,7 @@ impl Bus {
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let byte = self.data[address as usize];
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self.data[address as usize] = (data & 0b11110000) | (byte & 0b00001111);
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} else if VIDEO_RAM.contains(&address) {
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return self.ppu.write_vram_external(address, data);
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return self.ppu.write_vram(address, data);
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} else if SPRITE_ATTRIBUTE_TABLE.contains(&address) {
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return self.ppu.write_oam(address, data);
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} else if address == DMA_ADDRESS {
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@ -4,7 +4,6 @@ pub mod ppu;
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pub mod timer;
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pub mod sound;
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pub mod rom;
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pub mod ram;
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pub mod bus;
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pub mod interrupts;
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pub mod joypad;
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|
115
src/ppu.rs
115
src/ppu.rs
@ -26,7 +26,6 @@ pub const OBJECT_PALETTE_0_ADDRESS: u16 = 0xFF48;
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pub const OBJECT_PALETTE_1_ADDRESS: u16 = 0xFF49;
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pub const WINDOW_Y_ADDRESS: u16 = 0xFF4A;
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pub const WINDOW_X_ADDRESS: u16 = 0xFF4B;
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pub const VRAM_BANK_SELECT_ADDRESS: u16 = 0xFF4F;
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pub const TILE_MAP_ADDRESS: u16 = 0x9800;
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@ -127,26 +126,6 @@ pub enum LCDStatus {
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ModeFlag(LCDStatusModeFlag),
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}
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struct BgAttributes {
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bg_to_oam_priority: bool,
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vertical_flip: bool,
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horizontal_flip: bool,
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vram_bank: u8,
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palette_number: u8,
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}
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impl BgAttributes {
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pub fn new(byte: u8) -> Self {
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Self {
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bg_to_oam_priority: get_bit(byte, BitIndex::I7),
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vertical_flip: get_bit(byte, BitIndex::I6),
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horizontal_flip: get_bit(byte, BitIndex::I5),
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vram_bank: get_bit(byte, BitIndex::I3) as u8,
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palette_number: byte & 0b111,
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}
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}
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}
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struct Sprite {
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x: u8,
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y: u8,
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@ -157,8 +136,6 @@ struct Sprite {
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y_flip: bool,
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over_bg: bool,
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bit_pixels: Option<[u8; 8]>,
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vram_bank: u8,
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palette_number: u8,
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}
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impl Sprite {
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@ -252,15 +229,13 @@ pub struct PPU {
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scroll_y: u8,
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window_x: u8,
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window_y: u8,
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io_registers: [u8; 16],
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vram: [u8; 0x2000 * 2],
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io_registers: [u8; 12],
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vram: [u8; 0x2000],
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oam: [u8; 0xA0],
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vram_bank: u8,
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cgb_mode: bool,
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}
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impl PPU {
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pub fn new(cgb_mode: bool) -> Self {
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pub fn new() -> Self {
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Self {
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state: false,
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background_priority: false,
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@ -281,41 +256,21 @@ impl PPU {
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scroll_y: 0,
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window_x: 0,
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window_y: 0,
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io_registers: [0; 16],
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vram: [0; 0x2000 * 2],
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io_registers: [0; 12],
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vram: [0; 0x2000],
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oam: [0; 0xA0],
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vram_bank: 0,
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cgb_mode,
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}
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}
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pub fn set_vram_bank(&mut self, bank: u8) {
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if self.cgb_mode {
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self.vram_bank = bank & 1;
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}
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}
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pub fn get_vram_bank(&self) -> u8 {
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self.vram_bank | 0xFE
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}
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pub fn is_io_register(address: u16) -> bool {
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address >= 0xFF40 && address <= 0xFF4F
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address >= 0xFF40 && address <= 0xFF4B
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}
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pub fn read_vram_external(&self, address: u16) -> u8 {
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self.vram[((address + (0x2000 * self.vram_bank as u16)) - 0x8000) as usize]
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}
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pub fn write_vram_external(&mut self, address: u16, data: u8) {
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self.vram[((address + (0x2000 * self.vram_bank as u16)) - 0x8000) as usize] = data;
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}
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fn read_vram(&self, address: u16) -> u8 {
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pub fn read_vram(&self, address: u16) -> u8 {
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self.vram[(address - 0x8000) as usize]
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}
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fn write_vram(&mut self, address: u16, data: u8) {
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pub fn write_vram(&mut self, address: u16, data: u8) {
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self.vram[(address - 0x8000) as usize] = data;
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}
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@ -328,9 +283,7 @@ impl PPU {
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}
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pub fn get_register(&self, address: u16) -> u8 {
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if address == VRAM_BANK_SELECT_ADDRESS {
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return self.get_vram_bank();
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} else if address == LCD_CONTROL_ADDRESS {
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if address == LCD_CONTROL_ADDRESS {
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return self.lcd_control;
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} else if address == LCD_Y_ADDRESS {
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return self.lcd_y;
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@ -339,9 +292,7 @@ impl PPU {
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}
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pub fn set_register(&mut self, address: u16, data: u8) {
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if address == VRAM_BANK_SELECT_ADDRESS {
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return self.set_vram_bank(data);
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} else if address == LCD_Y_ADDRESS {
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if address == LCD_Y_ADDRESS {
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return;
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} else if address == LCD_CONTROL_ADDRESS {
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self.lcd_control = data;
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@ -514,19 +465,12 @@ impl PPU {
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y_flip: get_bit(attributes, BitIndex::I6),
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over_bg: get_bit(attributes, BitIndex::I7),
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bit_pixels: None,
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vram_bank: match self.cgb_mode && get_bit(attributes, BitIndex::I3) {
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true => 1,
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false => 0,
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},
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palette_number: attributes & 0b111,
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});
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addr += 4;
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}
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if !self.cgb_mode {
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self.sprite_buffer.sort_by(|a, b| a.x().cmp(&b.x()));
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}
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}
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fn find_sprite_pixel(&mut self) -> Option<(Pixel, bool)> {
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let lcd_y = self.lcd_y;
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@ -578,17 +522,12 @@ impl PPU {
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self.force_set_register(LCD_STATUS_ADDRESS, byte);
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}
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fn get_tile_bytes(&self, x: u8, y: u8, tilemap_area: u16, default_method: bool) -> (u8, u8, BgAttributes) {
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fn get_tile_bytes(&self, x: u8, y: u8, tilemap_area: u16, default_method: bool) -> (u8, u8) {
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let index_x = x as u16 / 8;
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let index_y = (y as u16 / 8) * 32;
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let index = index_x + index_y;
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let tile_line = (y).rem_euclid(8) * 2;
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let tile_number = self.read_vram(tilemap_area + index as u16) as u16;
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let mut tile_line = (y).rem_euclid(8);
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let attributes = BgAttributes::new(self.read_vram(tilemap_area + 0x2000 + index as u16));
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if self.cgb_mode && attributes.vertical_flip {
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tile_line = 7 - tile_line;
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}
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tile_line = tile_line * 2;
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let addr = if default_method {
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0x8000 + tile_line as u16 + (tile_number * 16)
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} else {
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@ -598,31 +537,7 @@ impl PPU {
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(base + tile_line + (tile_number * 16)) as u16
|
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};
|
||||
|
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if !self.cgb_mode {
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return (self.read_vram(addr), self.read_vram(addr + 1), attributes);
|
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}
|
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let byte1 = self.read_vram(addr + (0x2000 * (attributes.vram_bank as u16)));
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let byte2 = self.read_vram(addr + (0x2000 * (attributes.vram_bank as u16)) + 1);
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if attributes.horizontal_flip {
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let byte1 = ((byte1 >> 7) & 0b1) |
|
||||
((byte1 >> 5) & 0b10) |
|
||||
((byte1 >> 3) & 0b100) |
|
||||
((byte1 >> 1) & 0b1000) |
|
||||
((byte1 << 1) & 0b10000) |
|
||||
((byte1 << 3) & 0b100000) |
|
||||
((byte1 << 5) & 0b1000000) |
|
||||
((byte1 << 7) & 0b10000000);
|
||||
let byte2 = ((byte2 >> 7) & 0b1) |
|
||||
((byte2 >> 5) & 0b10) |
|
||||
((byte2 >> 3) & 0b100) |
|
||||
((byte2 >> 1) & 0b1000) |
|
||||
((byte2 << 1) & 0b10000) |
|
||||
((byte2 << 3) & 0b100000) |
|
||||
((byte2 << 5) & 0b1000000) |
|
||||
((byte2 << 7) & 0b10000000);
|
||||
return (byte1, byte2, attributes);
|
||||
}
|
||||
return (byte1, byte2, attributes);
|
||||
(self.read_vram(addr), self.read_vram(addr + 1))
|
||||
}
|
||||
|
||||
fn get_window_pixel(&mut self) -> Option<Pixel> {
|
||||
@ -662,7 +577,7 @@ impl PPU {
|
||||
true => 0x9C00,
|
||||
false => 0x9800,
|
||||
};
|
||||
let (tile_byte_1, tile_byte_2, _) = self.get_tile_bytes(x, y, tilemap_area, default_mode);
|
||||
let (tile_byte_1, tile_byte_2) = self.get_tile_bytes(x, y, tilemap_area, default_mode);
|
||||
let bit_pixels_array = PPU::get_byte_pixels(tile_byte_1, tile_byte_2);
|
||||
self.current_window_pixels = Some(bit_pixels_array);
|
||||
|
||||
@ -699,7 +614,7 @@ impl PPU {
|
||||
true => 0x9C00,
|
||||
false => 0x9800,
|
||||
};
|
||||
let (tile_byte_1, tile_byte_2, _) = self.get_tile_bytes(x, y, tilemap_area, default_mode);
|
||||
let (tile_byte_1, tile_byte_2) = self.get_tile_bytes(x, y, tilemap_area, default_mode);
|
||||
let bit_pixels_array = PPU::get_byte_pixels(tile_byte_1, tile_byte_2);
|
||||
self.current_background_pixels = Some(bit_pixels_array);
|
||||
|
||||
|
80
src/ram.rs
80
src/ram.rs
@ -1,80 +0,0 @@
|
||||
pub const WRAM_BANK_SELECT_ADDRESS: u16 = 0xFF70;
|
||||
|
||||
pub trait RAM {
|
||||
fn read(&self, address: u16) -> u8;
|
||||
fn write(&mut self, address: u16, value: u8);
|
||||
}
|
||||
|
||||
pub struct DMGRAM {
|
||||
data: [u8; 4096 * 2],
|
||||
}
|
||||
|
||||
impl DMGRAM {
|
||||
pub fn new() -> Self {
|
||||
Self {
|
||||
data: [0; 4096 * 2],
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
impl RAM for DMGRAM {
|
||||
fn read(&self, address: u16) -> u8 {
|
||||
if address == WRAM_BANK_SELECT_ADDRESS {
|
||||
return 0xFF;
|
||||
}
|
||||
self.data[(address - 0xC000) as usize]
|
||||
}
|
||||
|
||||
fn write(&mut self, address: u16, value: u8) {
|
||||
if address == WRAM_BANK_SELECT_ADDRESS {
|
||||
return;
|
||||
}
|
||||
self.data[(address - 0xC000) as usize] = value;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
pub struct CGBRAM {
|
||||
data: [u8; 4096 * 8],
|
||||
bank: u8,
|
||||
|
||||
}
|
||||
|
||||
impl CGBRAM {
|
||||
pub fn new() -> Self {
|
||||
Self {
|
||||
data: [0; 4096 * 8],
|
||||
bank: 1,
|
||||
}
|
||||
}
|
||||
|
||||
fn switch_bank(&mut self, bank: u8) {
|
||||
self.bank = bank;
|
||||
if self.bank > 7 {
|
||||
self.bank = 7;
|
||||
} else if bank == 0 {
|
||||
self.bank = 0;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
impl RAM for CGBRAM {
|
||||
fn read(&self, address: u16) -> u8 {
|
||||
if address == WRAM_BANK_SELECT_ADDRESS {
|
||||
return self.bank;
|
||||
}
|
||||
if address <= 0xCFFF {
|
||||
return self.data[(address - 0xC000) as usize];
|
||||
}
|
||||
self.data[((address - 0xC000) as usize) * (self.bank as usize)]
|
||||
}
|
||||
|
||||
fn write(&mut self, address: u16, value: u8) {
|
||||
if address == WRAM_BANK_SELECT_ADDRESS {
|
||||
return self.switch_bank(value);
|
||||
} else if address <= 0xCFFF {
|
||||
return self.data[(address - 0xC000) as usize] = value;
|
||||
}
|
||||
self.data[((address - 0xC000) as usize) * (self.bank as usize)] = value;
|
||||
}
|
||||
}
|
11
src/rom.rs
11
src/rom.rs
@ -41,7 +41,6 @@ pub fn load_rom(_filename: &str) -> std::io::Result<Box<dyn ROM>> {
|
||||
filename: "".to_string(),
|
||||
publisher: "".to_string(),
|
||||
title: "".to_string(),
|
||||
cgb_features: false,
|
||||
cgb_only: false,
|
||||
sgb_features: false,
|
||||
has_ram: false,
|
||||
@ -151,7 +150,6 @@ pub struct ROMInfo {
|
||||
filename: String,
|
||||
publisher: String,
|
||||
title: String,
|
||||
cgb_features: bool,
|
||||
cgb_only: bool,
|
||||
sgb_features: bool,
|
||||
has_ram: bool,
|
||||
@ -163,14 +161,6 @@ pub struct ROMInfo {
|
||||
}
|
||||
|
||||
impl ROMInfo {
|
||||
pub fn cgb_features(&self) -> bool {
|
||||
self.cgb_features
|
||||
}
|
||||
|
||||
pub fn cgb_only(&self) -> bool {
|
||||
self.cgb_only
|
||||
}
|
||||
|
||||
pub fn set_filename(&mut self, filename: String) {
|
||||
self.filename = filename;
|
||||
}
|
||||
@ -215,7 +205,6 @@ impl ROMInfo {
|
||||
},
|
||||
publisher: "".to_string(), // TODO: Extract publisher
|
||||
title: "".to_string(), // TODO: Extract the game title
|
||||
cgb_features: bytes[CGB_FLAG_ADDRESS as usize] == 0x80,
|
||||
cgb_only: bytes[CGB_FLAG_ADDRESS as usize] == 0xC0,
|
||||
sgb_features: bytes[SGB_FLAG_ADDRESS as usize] == 0x03,
|
||||
has_ram: match rom_type {
|
||||
|
28
src/sound.rs
28
src/sound.rs
@ -1,7 +1,7 @@
|
||||
use std::env;
|
||||
use std::ops::RangeInclusive;
|
||||
use std::sync::{Arc, Mutex};
|
||||
use cpal::{Stream, StreamConfig, Device, Sample, SampleRate};
|
||||
use cpal::{Stream, StreamConfig, Device, Sample};
|
||||
use cpal::traits::{DeviceTrait, HostTrait, StreamTrait};
|
||||
use crate::cpu::Cycles;
|
||||
use crate::utils::join_bytes;
|
||||
@ -34,8 +34,6 @@ pub const NR52_ADDRESS: u16 = 0xFF26;
|
||||
|
||||
pub const WAVE_PATTERN_RAM: RangeInclusive<u16> = 0xFF30..=0xFF3F;
|
||||
|
||||
pub const SAMPLE_RATE: u32 = 48000;
|
||||
|
||||
const WAVE_DUTY_PATTERNS: [[u8; 8]; 4] = [
|
||||
[0, 0, 0, 0, 0, 0, 0, 1],
|
||||
[0, 0, 0, 0, 0, 0, 1, 1],
|
||||
@ -50,15 +48,25 @@ struct ChannelTwo {
|
||||
frequency_timer: u16,
|
||||
duty_position: usize,
|
||||
sample_timer: usize,
|
||||
sample_rate: usize,
|
||||
buffer_pos: usize,
|
||||
}
|
||||
|
||||
impl ChannelTwo {
|
||||
pub fn new(device: &Device, config: &StreamConfig) -> Self {
|
||||
pub fn new(device: &Device, config: &StreamConfig, sample_rate: usize) -> Self {
|
||||
let mut count: usize = 0;
|
||||
let buffer = Arc::new(Mutex::new(vec![0.0; SAMPLE_RATE as usize]));
|
||||
// let mut count: f32 = 0.0;
|
||||
let buffer = Arc::new(Mutex::new(vec![0.0; sample_rate]));
|
||||
let buffer_clone = buffer.clone();
|
||||
let stream = device.build_output_stream(&config, move |data: &mut [f32], _| {
|
||||
/* for sample in data.iter_mut() {
|
||||
let y: f32 = ((count / (sample_rate as f32)) * 440.0 * 2.0 * 3.14159).sin().clamp(-1.0, 1.0);
|
||||
*sample = Sample::from(&y);
|
||||
count += 1.0;
|
||||
if count >= sample_rate as f32 {
|
||||
count = 0.0;
|
||||
}
|
||||
} */
|
||||
let b = buffer_clone.lock().unwrap();
|
||||
for sample in data.iter_mut() {
|
||||
*sample = Sample::from(&b[count]);
|
||||
@ -76,6 +84,7 @@ impl ChannelTwo {
|
||||
duty_position: 0,
|
||||
sample_timer: 0,
|
||||
buffer_pos: 0,
|
||||
sample_rate,
|
||||
buffer,
|
||||
}
|
||||
}
|
||||
@ -105,10 +114,10 @@ impl ChannelTwo {
|
||||
self.duty_position = 0;
|
||||
}
|
||||
}
|
||||
self.sample_timer = self.sample_timer.saturating_add(SAMPLE_RATE as usize);
|
||||
self.sample_timer = self.sample_timer.saturating_add(self.sample_rate);
|
||||
if self.sample_timer >= 4194304 {
|
||||
self.update_buffer(duty);
|
||||
self.sample_timer -= 4194304;
|
||||
self.sample_timer = 0;
|
||||
}
|
||||
}
|
||||
}
|
||||
@ -139,12 +148,13 @@ impl Sound {
|
||||
.expect("error while querying configs");
|
||||
let supported_config = supported_configs_range.next()
|
||||
.expect("no supported config?!")
|
||||
.with_sample_rate(SampleRate(SAMPLE_RATE));
|
||||
.with_max_sample_rate();
|
||||
// let err_fn = |err| eprintln!("an error occurred on the output audio stream: {}", err);
|
||||
let sample_rate = supported_config.sample_rate().0;
|
||||
let config: StreamConfig = supported_config.into();
|
||||
return Self {
|
||||
io_registers: [0; 48],
|
||||
channel_two: Some(ChannelTwo::new(&device, &config)),
|
||||
channel_two: Some(ChannelTwo::new(&device, &config, sample_rate as usize)),
|
||||
};
|
||||
}
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user