rmg-001/src/bus.rs

183 lines
7.2 KiB
Rust
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use crate::utils::{
get_bit,
set_bit,
BitIndex,
join_bytes
};
use crate::rom::ROM;
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use crate::ppu::{
PPU,
LCDStatus,
LCDStatusModeFlag,
LCD_STATUS_ADDRESS,
LCD_CONTROL_ADDRESS,
LCD_Y_ADDRESS
};
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use crate::cpu::{Interrupt};
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use crate::timer::{TIMER_DIVIDER_REGISTER_ADDRESS};
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use crate::joypad::{Joypad, JOYPAD_ADDRESS};
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pub struct AddressRange {
begin: u16,
end: u16,
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}
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impl AddressRange {
pub fn begin(&self) -> u16 {
self.begin
}
pub fn end(&self) -> u16 {
self.end
}
pub fn in_range(&self, address: u16) -> bool {
address >= self.begin && address <= self.end
}
}
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pub const BANK_ZERO: AddressRange = AddressRange{begin: 0x0000, end: 0x3FFF};
pub const BANK_SWITCHABLE: AddressRange = AddressRange{begin: 0x4000, end: 0x7FFF};
pub const VIDEO_RAM: AddressRange = AddressRange{begin: 0x8000, end: 0x9FFF};
pub const EXTERNAL_RAM: AddressRange = AddressRange{begin: 0xA000, end: 0xBFFF};
pub const WORK_RAM_1: AddressRange = AddressRange{begin: 0xC000, end: 0xCFFF};
pub const WORK_RAM_2: AddressRange = AddressRange{begin: 0xD000, end: 0xDFFF};
pub const ECHO_RAM: AddressRange = AddressRange{begin: 0xE000, end: 0xFDFF};
pub const SPRITE_ATTRIBUTE_TABLE: AddressRange = AddressRange{begin: 0xFE00, end: 0xFE9F};
pub const NOT_USABLE: AddressRange = AddressRange{begin: 0xFEA0, end: 0xFEFF};
pub const IO_REGISTERS: AddressRange = AddressRange{begin: 0xFF00, end: 0xFF7F};
pub const HIGH_RAM: AddressRange = AddressRange{begin: 0xFF80, end: 0xFFFE};
pub const INTERRUPT_ENABLE_REGISTER: AddressRange = AddressRange{begin: 0xFFFF, end: 0xFFFF};
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pub const INTERRUPT_ENABLE_ADDRESS: u16 = 0xFFFF;
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pub const INTERRUPT_FLAG_ADDRESS: u16 = 0xFF0F;
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pub struct Bus {
game_rom: ROM,
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data: [u8; 0x10000],
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pub reset_timer: bool,
}
impl Bus {
pub fn new() -> Self {
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let game_rom = match ROM::load_file("ignore/mooneye/acceptance/if_ie_registers.gb".to_string()) {
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// let game_rom = match ROM::load_file("roms/cpu_instrs.gb".to_string()) {
// let game_rom = match ROM::load_file("roms/cpu_instrs_individual/01-special.gb".to_string()) {
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// let game_rom = match ROM::load_file("roms/cpu_instrs_individual/02-interrupts.gb".to_string()) {
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// let game_rom = match ROM::load_file("roms/cpu_instrs_individual/03-op sp,hl.gb".to_string()) {
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// let game_rom = match ROM::load_file("roms/cpu_instrs_individual/04-op r,imm.gb".to_string()) {
// let game_rom = match ROM::load_file("roms/cpu_instrs_individual/05-op rp.gb".to_string()) {
// let game_rom = match ROM::load_file("roms/cpu_instrs_individual/06-ld r,r.gb".to_string()) {
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// let game_rom = match ROM::load_file("roms/cpu_instrs_individual/07-jr,jp,call,ret,rst.gb".to_string()) {
// let game_rom = match ROM::load_file("roms/cpu_instrs_individual/08-misc instrs.gb".to_string()) {
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// let game_rom = match ROM::load_file("roms/cpu_instrs_individual/09-op r,r.gb".to_string()) {
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// let game_rom = match ROM::load_file("roms/cpu_instrs_individual/10-bit ops.gb".to_string()) {
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// let game_rom = match ROM::load_file("roms/cpu_instrs_individual/11-op a,(hl).gb".to_string()) {
Ok(rom) => rom,
// _ => ROM::from_bytes(&[0; 0xFFFF])
_ => panic!("Could not read ROM"),
};
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let mut data = [0x00; 0x10000];
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// Hardware registers after the bootrom
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data[0xFF00] = 0xCF;
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data[0xFF01] = 0x00;
data[0xFF02] = 0x7E;
data[0xFF04] = 0x18;
data[0xFF05] = 0x00;
data[0xFF06] = 0x00;
data[0xFF07] = 0xF8;
data[0xFF0F] = 0xE1;
data[0xFF40] = 0x91;
data[0xFF41] = 0x81;
data[0xFF42] = 0x00;
data[0xFF43] = 0x00;
data[0xFF44] = 0x91;
data[0xFF45] = 0x00;
data[0xFF46] = 0xFF;
data[0xFF47] = 0xFC;
data[0xFF4A] = 0x00;
data[0xFF4B] = 0x00;
data[0xFFFF] = 0x00;
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Self {
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data,
game_rom,
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reset_timer: false,
}
}
pub fn read(&self, address: u16) -> u8 {
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if BANK_ZERO.in_range(address) || BANK_SWITCHABLE.in_range(address) {
return self.game_rom.read(address);
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} else if address == INTERRUPT_ENABLE_ADDRESS || address == INTERRUPT_FLAG_ADDRESS {
return 0b11100000 | self.data[address as usize];
}
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self.data[address as usize]
}
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pub fn read_16bit(&self, address: u16) -> u16 {
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join_bytes(self.read(address.wrapping_add(1)), self.read(address))
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}
pub fn write(&mut self, address: u16, data: u8) {
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if address == 0xFF01 {
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// print!("{}", data as char);
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}
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if BANK_ZERO.in_range(address) || BANK_SWITCHABLE.in_range(address) {
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// println!("WRITING TO ROM");
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} else if WORK_RAM_1.in_range(address) || WORK_RAM_2.in_range(address) {
self.data[address as usize] = data;
// Copy to the ECHO RAM
if address <= 0xDDFF {
self.data[(ECHO_RAM.begin() + (address - WORK_RAM_1.begin())) as usize] = data;
}
} else if ECHO_RAM.in_range(address) {
self.data[address as usize] = data;
self.data[(WORK_RAM_1.begin() + (address - ECHO_RAM.begin())) as usize] = data; // Copy to the working RAM
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} else if address == TIMER_DIVIDER_REGISTER_ADDRESS {
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self.reset_timer = true;
} else if address == LCD_CONTROL_ADDRESS && get_bit(data, BitIndex::I7) {
self.data[address as usize] = data;
self.data[LCD_Y_ADDRESS as usize] = 0x00;
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} else if address == LCD_Y_ADDRESS {
// println!("Write to LCD_Y not allowed");
} else if address == LCD_STATUS_ADDRESS {
let byte = self.data[address as usize];
self.data[address as usize] = (data & 0b11111000) | (byte & 0b00000111);
} else if address == JOYPAD_ADDRESS {
let byte = self.data[address as usize];
self.data[address as usize] = (data & 0b11110000) | (byte & 0b00001111);
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} else {
self.data[address as usize] = data;
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}
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}
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pub fn force_write(&mut self, address: u16, data: u8) {
self.data[address as usize] = data;
}
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pub fn write_16bit(&mut self, address: u16, data: u16) {
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let bytes = data.to_le_bytes();
self.write(address, bytes[0]);
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self.write(address.wrapping_add(1), bytes[1]);
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}
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pub fn set_interrupt_enable(&mut self, interrupt: Interrupt, val: bool) {
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let byte = self.read(INTERRUPT_ENABLE_ADDRESS);
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self.write(INTERRUPT_ENABLE_ADDRESS, interrupt.set(byte, val));
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}
pub fn set_interrupt_flag(&mut self, interrupt: Interrupt, val: bool) {
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let byte = self.read(INTERRUPT_FLAG_ADDRESS);
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self.write(INTERRUPT_FLAG_ADDRESS, interrupt.set(byte, val));
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}
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pub fn get_interrupt(&mut self, interrupt: Interrupt) -> bool {
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let byte = self.read(INTERRUPT_ENABLE_ADDRESS) & self.read(INTERRUPT_FLAG_ADDRESS);
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interrupt.get(byte)
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}
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}