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https://github.com/FranLMSP/rmg-001.git
synced 2024-11-23 10:12:11 +00:00
Refactor interrupt enum
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parent
66731e1c8e
commit
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44
src/bus.rs
44
src/bus.rs
@ -106,9 +106,7 @@ impl Bus {
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self.data[address as usize] = data;
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self.data[address as usize] = data;
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self.data[(WORK_RAM_1.begin() + (address - ECHO_RAM.begin())) as usize] = data; // Copy to the working RAM
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self.data[(WORK_RAM_1.begin() + (address - ECHO_RAM.begin())) as usize] = data; // Copy to the working RAM
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} else if VIDEO_RAM.in_range(address) {
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} else if VIDEO_RAM.in_range(address) {
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// if !PPU::get_lcd_status(self, LCDStatus::ModeFlag(LCDStatusModeFlag::TransferringToLCD)) {
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self.data[address as usize] = data;
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self.data[address as usize] = data;
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// }
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} else {
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} else {
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self.data[address as usize] = data;
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self.data[address as usize] = data;
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}
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}
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@ -120,46 +118,18 @@ impl Bus {
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self.write(address.wrapping_add(1), bytes[1]);
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self.write(address.wrapping_add(1), bytes[1]);
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}
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}
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pub fn set_interrupt_master(&mut self, flag: Interrupt, val: bool) {
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pub fn set_interrupt_master(&mut self, interrupt: Interrupt, val: bool) {
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let byte = self.read(INTERRUPT_ENABLE_ADDRESS);
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let byte = self.read(INTERRUPT_ENABLE_ADDRESS);
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self.write(INTERRUPT_ENABLE_ADDRESS, match flag {
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self.write(INTERRUPT_ENABLE_ADDRESS, interrupt.set(byte, val));
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Interrupt::VBlank => set_bit(byte, val, BitIndex::I0),
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Interrupt::LCDSTAT => set_bit(byte, val, BitIndex::I1),
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Interrupt::Timer => set_bit(byte, val, BitIndex::I2),
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Interrupt::Serial => set_bit(byte, val, BitIndex::I3),
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Interrupt::Joypad => set_bit(byte, val, BitIndex::I4),
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});
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}
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}
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pub fn set_interrupt(&mut self, flag: Interrupt, val: bool) {
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pub fn set_interrupt(&mut self, interrupt: Interrupt, val: bool) {
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let byte = self.read(INTERRUPT_FLAG_ADDRESS);
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let byte = self.read(INTERRUPT_FLAG_ADDRESS);
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self.write(INTERRUPT_FLAG_ADDRESS, match flag {
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self.write(INTERRUPT_FLAG_ADDRESS, interrupt.set(byte, val));
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Interrupt::VBlank => set_bit(byte, val, BitIndex::I0),
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Interrupt::LCDSTAT => set_bit(byte, val, BitIndex::I1),
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Interrupt::Timer => set_bit(byte, val, BitIndex::I2),
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Interrupt::Serial => set_bit(byte, val, BitIndex::I3),
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Interrupt::Joypad => set_bit(byte, val, BitIndex::I4),
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});
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}
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}
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pub fn get_interrupt(&mut self, flag: Interrupt) -> bool {
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pub fn get_interrupt(&mut self, interrupt: Interrupt) -> bool {
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let byte = self.read(INTERRUPT_ENABLE_ADDRESS) & self.read(INTERRUPT_FLAG_ADDRESS);
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let byte = self.read(INTERRUPT_ENABLE_ADDRESS) & self.read(INTERRUPT_FLAG_ADDRESS);
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match flag {
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interrupt.get(byte)
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Interrupt::VBlank => get_bit(byte, BitIndex::I0),
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Interrupt::LCDSTAT => get_bit(byte, BitIndex::I1),
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Interrupt::Timer => get_bit(byte, BitIndex::I2),
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Interrupt::Serial => get_bit(byte, BitIndex::I3),
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Interrupt::Joypad => get_bit(byte, BitIndex::I4),
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}
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}
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pub fn get_interrupt_vector(flag: Interrupt) -> u16 {
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match flag {
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Interrupt::VBlank => 0x40,
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Interrupt::LCDSTAT => 0x48,
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Interrupt::Timer => 0x50,
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Interrupt::Serial => 0x58,
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Interrupt::Joypad => 0x60,
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}
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}
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}
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}
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}
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32
src/cpu.rs
32
src/cpu.rs
@ -62,6 +62,36 @@ pub enum Interrupt {
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Joypad,
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Joypad,
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}
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}
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impl Interrupt {
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fn get_bit_index(&self) -> BitIndex {
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match self {
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Interrupt::VBlank => BitIndex::I0,
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Interrupt::LCDSTAT => BitIndex::I1,
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Interrupt::Timer => BitIndex::I2,
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Interrupt::Serial => BitIndex::I3,
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Interrupt::Joypad => BitIndex::I4,
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}
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}
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pub fn get(&self, byte: u8) -> bool {
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get_bit(byte, self.get_bit_index())
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}
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pub fn set(&self, byte: u8, val: bool) -> u8 {
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set_bit(byte, val, self.get_bit_index())
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}
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pub fn get_vector(&self) -> u16 {
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match self {
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Interrupt::VBlank => 0x40,
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Interrupt::LCDSTAT => 0x48,
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Interrupt::Timer => 0x50,
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Interrupt::Serial => 0x58,
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Interrupt::Joypad => 0x60,
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}
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}
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}
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pub struct Registers {
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pub struct Registers {
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a: u8,
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a: u8,
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f: u8,
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f: u8,
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@ -871,7 +901,7 @@ impl CPU {
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pub fn handle_interrupt(&mut self, bus: &mut Bus, interrupt: Interrupt) {
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pub fn handle_interrupt(&mut self, bus: &mut Bus, interrupt: Interrupt) {
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bus.set_interrupt_master(interrupt, false);
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bus.set_interrupt_master(interrupt, false);
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bus.set_interrupt(interrupt, false);
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bus.set_interrupt(interrupt, false);
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let vector = Bus::get_interrupt_vector(interrupt);
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let vector = interrupt.get_vector();
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self.exec(Opcode::CALL(OpcodeParameter::U16(vector)), bus);
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self.exec(Opcode::CALL(OpcodeParameter::U16(vector)), bus);
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self.increment_cycles(Cycles(5));
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self.increment_cycles(Cycles(5));
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println!("Interrupt: {:?}", interrupt);
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println!("Interrupt: {:?}", interrupt);
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@ -20,7 +20,6 @@ impl Emulator {
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}
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}
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pub fn draw(&mut self, frame: &mut [u8]) {
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pub fn draw(&mut self, frame: &mut [u8]) {
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// self.ppu.draw_background(&mut self.bus);
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let ppu_frame = self.ppu.get_rgba_frame();
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let ppu_frame = self.ppu.get_rgba_frame();
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for (i, pixel) in frame.chunks_exact_mut(4).enumerate() {
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for (i, pixel) in frame.chunks_exact_mut(4).enumerate() {
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pixel.copy_from_slice(&ppu_frame[i]);
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pixel.copy_from_slice(&ppu_frame[i]);
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@ -40,7 +39,6 @@ impl Emulator {
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while !exit {
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while !exit {
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self.cpu.run(&mut self.bus);
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self.cpu.run(&mut self.bus);
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// thread::sleep(time::Duration::from_millis(100));
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// exit = self.cpu.get_exec_calls_count() >= 1258895; // log 1
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// exit = self.cpu.get_exec_calls_count() >= 1258895; // log 1
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// exit = self.cpu.get_exec_calls_count() >= 1068422; // log 3
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// exit = self.cpu.get_exec_calls_count() >= 1068422; // log 3
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// exit = self.cpu.get_exec_calls_count() >= 1262766; // log 4
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// exit = self.cpu.get_exec_calls_count() >= 1262766; // log 4
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11
src/timer.rs
Normal file
11
src/timer.rs
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@ -0,0 +1,11 @@
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const DIVIDER_REGISTER_ADDRESS: u16 = 0xFF04;
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const TIMER_COUNTER_ADDRESS: u16 = 0xFF05;
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const TIMER_MODULO_ADDRESS: u16 = 0xFF05;
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const TIMER_CONTROL_ADDRESS: u16 = 0xFF05;
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struct Timer;
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impl Timer {
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pub fn cycle() {
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}
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}
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