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CPL Instruction

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This commit is contained in:
Franco Colmenarez 2021-10-19 10:24:54 -05:00
parent 7bdbfebd0e
commit ad5211d057
2 changed files with 23 additions and 3 deletions
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6
src/bin/main.rs
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@ -2,7 +2,9 @@ use rust_boy::rom::ROM;
use rust_boy::console::Console;
fn main() -> std::io::Result<()> {
let mut console = Console::new();
console.cpu_run();
/* let mut console = Console::new();
console.cpu_run(); */
let val: u8 = 0b11110000;
println!("{:08b}", !val);
Ok(())
}

20
src/cpu.rs
View File

@ -222,7 +222,7 @@ pub enum Opcode {
LD(OpcodeParameter),
LDD(OpcodeParameter),
LDI(OpcodeParameter),
LDHL(OpcodeParameter),
// LDHL(OpcodeParameter),
PUSH(Register),
POP(Register),
ADD(OpcodeParameter),
@ -1025,6 +1025,12 @@ impl CPU {
_ => {},
};
},
Opcode::CPL => {
self.registers.increment(Register::PC, 1);
self.registers.set(Register::A, !self.registers.get(Register::A));
self.registers.set_flag(FlagRegister::Substract, true);
self.registers.set_flag(FlagRegister::HalfCarry, true);
},
// Disable interrupts
Opcode::DI => {
bus.write(0xFFFF, 0x00); // Disable all interrupts
@ -2987,6 +2993,18 @@ mod tests {
assert_eq!(cpu.registers.get(Register::PC), 0x101);
}
#[test]
fn test_cpl_instructions() {
let mut cpu = CPU::new();
let mut bus = Bus::new();
cpu.registers.set(Register::A, 0b11110000);
cpu.exec(Opcode::CPL, &mut bus);
assert_eq!(cpu.registers.get(Register::A), 0b00001111);
assert_eq!(cpu.registers.get(Register::PC), 0x101);
assert_eq!(cpu.registers.get_flag(FlagRegister::Substract), true);
assert_eq!(cpu.registers.get_flag(FlagRegister::HalfCarry), true);
}
#[test]
fn test_nop_instructions() {
let mut cpu = CPU::new();