12 Commits

Author	SHA1	Message	Date
Franco Colmenarez	a5fad87319	RLCA, LD and DI instructions	2021-10-14 13:25:20 -05:00
Franco Colmenarez	bc3b25857b	Little refactor	2021-10-14 08:38:57 -05:00
Franco Colmenarez	92229e3d93	JP u16 instruction	2021-10-13 20:50:48 -05:00
Franco Colmenarez	5d04b7c346	Modeling the Bus and writing first test for NOP instruction	2021-10-13 19:38:37 -05:00
Franco Colmenarez	1e363187f1	Define test for CPU instructions (no tests yet)	2021-10-12 18:29:25 -05:00
Franco Colmenarez	f62926a869	Enum most opcode parameters (CB prefix remaining)	2021-10-12 18:06:07 -05:00
Franco Colmenarez	9bf80459a7	Add illegal instruction	2021-10-12 12:52:04 -05:00
Franco Colmenarez	bbf6b19957	Mapping opcodes	2021-10-11 20:38:37 -05:00
Franco Colmenarez	b6f512f97b	Tests for registers getters and setters	2021-10-11 13:14:08 -05:00
Franco Colmenarez	d37699f4a8	Functions and tests for some bitwise operations and getter/setter for flag register	2021-10-11 12:58:09 -05:00
Franco Colmenarez	b3e6baaa3f	Getters and setters for registers	2021-10-11 11:39:13 -05:00
Franco Colmenarez	9818c57854	Define CPU registers	2021-10-11 10:53:02 -05:00